US3936725A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current mirrors
Assignee: AT&T Inc
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Filing: 1974-08-15
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Granted: 1976-02-03
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Expires: 1994-08-15
Abstract
Abstract Improved current mirrors are provided by connecting current mirrors of known types in cascode.
Inventors
- 👤 Herbert Anton Schneider
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 00:56
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
107 words
In combination, a first current mirror and a second current mirror, each of said current mirrors comprising first and second transistors, means for interconnecting the bases of said first and second transistors and means connected to the collector of said first transistor for providing base current for said first and second transistors, and cascode means for connecting said first and second current mirrors in a cascode configuration, said cascode means comprising means for coupling the emitter of each of said first and second transistors of said first current mirror to the collector of a respective one of said first and second transistors of said second current mirror.
Claim 2
Dependent Claim
107 words
In combination, a first current mirror and a second current mirror, each of said current mirrors comprising first and second transistors, means for interconnecting the bases of said first and second transistors and means connected to the collector of said first transistor for providing base current for said first and second transistors, and cascode means for connecting said first and second current mirrors in a cascode configuration, said cascode means comprising means for coupling the emitter of each of said first and second transistors of said first current mirror to the collector of a respective one of said first and second transistors of said second current mirror.
Claim 3
Dependent Claim
66 words
The combination of claim 1 wherein said emitter coupling means comprises means for coupling the emitters of said first and second transistors of said first current mirror to the collectors of said second and first transistors of said second current mirror, respectively, and wherein said combination further includes means for applying an input current to the collector of said first transistor of said first current mirror.
Claim 4
Dependent Claim
56 words
The combination of claim 2 wherein said base current providing means of each of said current mirrors comprises a third transistor, means for connecting the base of said third transistor to the collector of said first transistor, and means for connecting the emitter of said third transistor to the bases of said first and second transistors.
Claim 5
Dependent Claim
31 words
The combination of claim 1 wherein each of said current mirrors further comprises at least a third transistor connected in parallel to a selected one of said first and second transistors.
Claim 6
Dependent Claim
168 words
In combination, a first current mirror comprising first and second transistors, means for interconnecting the bases of said first and second transistors, first base current means for connecting the bases of said first and second transistors to the collector of a selected one of said first and second transistors; a second current mirror comprising third and fourth transistors, means for interconnecting the bases of said third and fourth transistors, and second base current means for connecting the bases of said third and fourth transistors to the collector of a selected one of said third and fourth transistors; means for connecting the emitters of said third and fourth transistors to a source of potential; means for coupling the emitters of said first and second transistors to the collectors of said third and fourth transistors, respectively; and means connected to the collector of said first transistor for receiving an input current, whereby an output current substantially equal to said input current is provided at the collector of said second transistor.
Claim 7
Dependent Claim
168 words
In combination, a first current mirror comprising first and second transistors, means for interconnecting the bases of said first and second transistors, first base current means for connecting the bases of said first and second transistors to the collector of a selected one of said first and second transistors; a second current mirror comprising third and fourth transistors, means for interconnecting the bases of said third and fourth transistors, and second base current means for connecting the bases of said third and fourth transistors to the collector of a selected one of said third and fourth transistors; means for connecting the emitters of said third and fourth transistors to a source of potential; means for coupling the emitters of said first and second transistors to the collectors of said third and fourth transistors, respectively; and means connected to the collector of said first transistor for receiving an input current, whereby an output current substantially equal to said input current is provided at the collector of said second transistor.
Claim 8
Dependent Claim
56 words
The combination of claim 5 wherein said first base current means comprises means for connecting the bases of said first and second transistors to the collector of said first transistor and wherein said second base current means comprises means for connecting the bases of said third and fourth transistors to the collector of said fourth transistor.
Claim 9
Dependent Claim
96 words
The combination of claim 6 wherein said first base current means includes a fifth transistor, means for connecting the base of said fifth transistor to the collector of said first transistor, and means for connecting the emitter of said fifth transistor to the bases of said first and second transistors, and wherein said second base current means includes a sixth transistor, means for connecting the base of said sixth transistor to the collector of said fourth transistor, and means for connecting the emitter of said sixth transistor to the bases of said third and fourth transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-02-02 | 1979-08-04 | 1980-02-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-02-02 | 1983-08-04 | 1984-02-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-02-02 | 1987-08-04 | 1988-02-03 | $7700.00 | Window Closed / Lapsed |