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Method for trimming thin-film transistor array

Assignee: LG Display Co Ltd
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Filing: 1988-02-26
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Granted: 1988-11-22
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Expires: 2008-02-26
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Abstract

Abstract A thin-film transistor array is constructed of at least a first thin-film transistor and a second thin-film transistor connected in parallel with the first thin-film transistor. These transistors are formed on a substrate under the condition that a source bus and a gate bus are connected to these transistors with forming a crossover portion. These parallel-connected transistors drive one pixel of a liquid crystal element. The first and second thin-film transistors are independently positioned in a symmetrically positional relationship with sandwiching the gate and source buses. In accordance with a laser trimming method of the invention, either gate bus or source bus located at one side of the crossover portion is first cut out so as to electrically disconnect the normally operable thin-film transistor from the array.

Inventors

  • 👤 Kazuya Oakabe
  • 👤 Chisato Iwasaki
  • 👤 Hitoshi Seki
  • 👤 Yasuhiko Kasama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 19:44
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/136259; G02F1/136263

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 127 words
A method for trimming a thin-film transistor array wherein a plurality of gate buses and of source buses are intersected with each other at a crossover portion on a substrate, and at least a first thin-film transistor is connected in parallel with a second thin-film transistor which are formed on the substrate adjacent to the crossover portion and connected to said gate buses and source buses so as to drive at least one pixel of a liquid crystal element, said first and second thin-film transistors being separately positioned in a symmetrically positional relationship with sandwiching one of the gate buses and source buses, comprising the steps of: starting laser trimming for one of said gate buses and source buses located at one side of the crossover portion.
Claim 2
Independent Claim 127 words
A method for trimming a thin-film transistor array wherein a plurality of gate buses and of source buses are intersected with each other at a crossover portion on a substrate, and at least a first thin-film transistor is connected in parallel with a second thin-film transistor which are formed on the substrate adjacent to the crossover portion and connected to said gate buses and source buses so as to drive at least one pixel of a liquid crystal element, said first and second thin-film transistors being separately positioned in a symmetrically positional relationship with sandwiching one of the gate buses and source buses, comprising the steps of: starting laser trimming for one of said gate buses and source buses located at one side of the crossover portion.
Claim 3
Dependent Claim 23 words
A method for trimming a thin-film transistor array as claimed in claim 1, further comprising an auxiliary bus for connecting the laser-trimmed buses.

References Cited (Backward Citations)

US4150366A Cited
US4240094A Cited
US4476375A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-11-22 1992-05-23 1992-11-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-11-22 1996-05-23 1996-11-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-11-22 2000-05-23 2000-11-22 $7700.00 Window Closed / Lapsed

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