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US4785340A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having doping multilayer structure

Assignee: National Institute of Advanced Industrial Science and Technology
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Filing: 1986-03-13
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Granted: 1988-11-15
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Expires: 2006-03-13
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Abstract

Abstract A semiconductor device includes a multilayer semiconductor structure comprising alternately p- (or n-) type heavily doped semiconductor layers and n- (or p-) type lightly doped semiconductor layers. Holes (or electrons) are confined within a narrow layer in a fashion like a two-dimensional gas, whereby high mobility is realized notwithstanding of high carrier concentration. Electrical conductivity of the multilayer semiconductor structure can be made higher than that of a bulk semiconductor. Very high conductivity can be realized by forming each layer in a thickness within a range of 10 Å to 1000 Å and preferably 50 Å to 500 Å. Ratio in impurity concentration of the heavily doped layer to the low doped layer is not smaller than one order of magnitude.

Inventors

  • 👤 Kiyokazu Nakagawa
  • 👤 Akitoshi Ishizaka
  • 👤 Yasuhiro Shiraki
  • 👤 Yoshimasa Murayama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 22:15
CPC Classifications
B; B82; B82Y; B82Y10/00; H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/054; H10D10/40; H10D30/00; H10D30/01; H10D30/012; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D62/80; H10D62/81; H10D62/815; H10D64/00; H10D64/01; H10D64/011; H10P14/22; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/3252; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/3444

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 209 words
A bipolar transistor comprising: a semiconductor substrate; an emitter layer of a first conductivity type, a base layer of a second conductivity type, opposite to said first conductivity type, and a collector layer of said first conductivity type, formed on said substrate; an emitter electrode, a base electrode, and a collector electrode for electrically connecting to said emitter layer, said base layer and said collector layer, respectively; a doping multilayer structure placed in contact with said base layer and with said base electrode for electrically interconnecting said base electrode and said base layer; wherein said doping multilayer structure has an opening through which said emitter layer is connected with said base layer, and wherein said doping multilayer structure comprises first semiconductor layers doped heavily with impurity of said second conductivity type, and second semiconductor layers formed of a same semiconductor material as that of said first semiconductor layers and doped lightly with impurity of said first conductivity type, said first and second semiconductor layers being alternately stacked, the ratio of impurity concentration in said first semiconductor layers to that in said second semiconductor layers being at least ten, and each of said first and second semiconductor layers having a thickness in a range from 10 Å to 1000 Å.
Claim 2
Dependent Claim 209 words
A bipolar transistor comprising: a semiconductor substrate; an emitter layer of a first conductivity type, a base layer of a second conductivity type, opposite to said first conductivity type, and a collector layer of said first conductivity type, formed on said substrate; an emitter electrode, a base electrode, and a collector electrode for electrically connecting to said emitter layer, said base layer and said collector layer, respectively; a doping multilayer structure placed in contact with said base layer and with said base electrode for electrically interconnecting said base electrode and said base layer; wherein said doping multilayer structure has an opening through which said emitter layer is connected with said base layer, and wherein said doping multilayer structure comprises first semiconductor layers doped heavily with impurity of said second conductivity type, and second semiconductor layers formed of a same semiconductor material as that of said first semiconductor layers and doped lightly with impurity of said first conductivity type, said first and second semiconductor layers being alternately stacked, the ratio of impurity concentration in said first semiconductor layers to that in said second semiconductor layers being at least ten, and each of said first and second semiconductor layers having a thickness in a range from 10 Å to 1000 Å.
Claim 3
Dependent Claim 20 words
A bipolar transistor according to claim 1, wherein said opening has a comb like or a lattice like planar pattern.
Claim 4
Dependent Claim 30 words
A bipolar transistor according to claim 1, wherein said base layer includes first and second base sub-layers, said doping multilayer structure being disposed between said first and second base sub-layers.
Claim 5
Dependent Claim 23 words
A bipolar transistor according to claim 1, wherein the first and the second semiconductor layers in said multilayer structure are formed of silicon.
Claim 6
Dependent Claim 23 words
A bipolar transistor according to claim 2, wherein the first and the second semiconductor layers in said multilayer structure are formed of silicon.
Claim 7
Dependent Claim 23 words
A bipolar transistor according to claim 3, wherein the first and the second semiconductor layers in said multilayer structure are formed of silicon.

References Cited (Backward Citations)

US4163237A Cited
US4514747A Cited
US4378629A Cited
JPS58142574A Cited
US4667211A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-11-15 1992-05-16 1992-11-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-11-15 1996-05-16 1996-11-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-11-15 2000-05-16 2000-11-15 $7700.00 Window Closed / Lapsed

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