Patent US4782372A successfully refreshed from Google Patents.
US4782372A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Lateral conductivity modulated MOSFET
Assignee: Toshiba Corp
•
Filing: 1987-02-26
•
Granted: 1988-11-01
•
Expires: 2007-02-26
Abstract
Abstract A conductivity modulated MOSFET, having a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the semiconductor substrate and having a high resistance, a base layer of the first conductivity type formed in the semiconductor layer, a source layer of the second conductivity type formed in the base layer, a gate electrode formed on a gate insulating film which is formed on a channel region, the channel region being formed in a surface of the base layer between the semiconductor layer and the source layer, a source electrode ohmic-contacting the source layer and the base layer, and a drain electrode formed on the surface of the semiconductor substrate opposite to the semiconductor layer, characterized in that the conductivity modulated MOSFET has a saturation current smaller than a latch-up current when a predetermined gate voltage is applied to the gate electrode.
Inventors
- 👤 Akio Nakagawa
- 👤 Hiromichi Ohashi
- 👤 Yoshihiro Yamaguchi
- 👤 Kiminori Watanabe
- 👤 Thuneo Thukakoshi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:16
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D12/00; H10D12/411; H10D12/415; H10D12/441; H10D62/102; H10D62/103; H10D62/105; H10D62/106; H10D62/124; H10D62/126; H10D62/127
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
216 words
A lateral conductivity modulated metal oxide semiconductor field effect transistor, comprising: a semiconductor substrate; a high resistance semiconductor layer of a first conductivity type formed over said semiconductor substrate and having a high resistance; a semiconductor region of the first conductivity type formed in a surface of said high resistance semiconductor layer and having an impurity concentration higher than that of said high resistance semiconductor layer; a drain region of a second conductivity type formed and located in said semiconductor region; a base region of the second conductivity type formed in said surface of said high resistance semiconductor layer, said base region surrounding a window of said high resistance semiconductor layer which is in said surface; a source region of the first conductivity type formed in said base region; a gate insulating film formed on a channel region which is formed in a surface of said base region between said high resistance semiconductor layer and said source region; a gate electrode formed on said gate insulating film; a source electrode ohmicly contacting said source region and said base region; and a drain electrode ohmicly contacting said drain region, whereby said lateral conductivity modulated metal oxide semiconductor field effect transistor can be operated in a condition that a latch up current is larger than a saturation current.
Claim 2
Dependent Claim
216 words
A lateral conductivity modulated metal oxide semiconductor field effect transistor, comprising: a semiconductor substrate; a high resistance semiconductor layer of a first conductivity type formed over said semiconductor substrate and having a high resistance; a semiconductor region of the first conductivity type formed in a surface of said high resistance semiconductor layer and having an impurity concentration higher than that of said high resistance semiconductor layer; a drain region of a second conductivity type formed and located in said semiconductor region; a base region of the second conductivity type formed in said surface of said high resistance semiconductor layer, said base region surrounding a window of said high resistance semiconductor layer which is in said surface; a source region of the first conductivity type formed in said base region; a gate insulating film formed on a channel region which is formed in a surface of said base region between said high resistance semiconductor layer and said source region; a gate electrode formed on said gate insulating film; a source electrode ohmicly contacting said source region and said base region; and a drain electrode ohmicly contacting said drain region, whereby said lateral conductivity modulated metal oxide semiconductor field effect transistor can be operated in a condition that a latch up current is larger than a saturation current.
Claim 3
Dependent Claim
16 words
The transistor according to claim 1, wherein said semiconductor substrate is of the first conductivity type.
Claim 4
Dependent Claim
16 words
The transistor according to claim 1, wherein said semiconductor substrate is of the second conductivity type.
Claim 5
Dependent Claim
17 words
The transistor according to claim 1, wherein said window is constructed by at least two parallel sides.
References Cited (Backward Citations)
US4072975A
Cited
US4364073A
Cited
US4502070A
Cited
DE3200634A1
Cited
US4589004A
Cited
JPS5897866A
Cited
US4689647A
Cited
US4680604A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-01 | 1992-05-02 | 1992-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-01 | 1996-05-02 | 1996-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-01 | 2000-05-02 | 2000-11-01 | $7700.00 | Window Closed / Lapsed |