Conductivity modulated MOS transistor device

Claim 1

A conductivity modulated MOS transistor device comprising: a first semiconductor layer of one conductivity type; a second semiconductor layer of an opposite conductivity type, formed in contact with said first semiconductor layer; a first semiconductor region of said one conductivity type formed by diffusion in a surface area of said second semiconductor layer; a second semiconductor region of said opposite conductivity type formed by diffusion in a surface region of said first semiconductor region to face said second semiconductor layer, the surface region of said first semiconductor region sandwiched between said second semiconductor region and said second semiconductor layer forming a channel region, and a source electrode formed on the second semiconductor region; a gate region including a gate insulation layer formed at least on said channel region, and a gate electrode formed on the gate insulation layer; a third semiconductor region of said one conductivity type formed by diffusion in said first semiconductor region without entering the channel region, and shallower than said first semiconductor region and deeper than said second semiconductor region, and including a portion which lies outside a vertical projection of said source electrode directly under said second semiconductor region and has a higher impurity concentration than said first semiconductor region; and a fourth semiconductor region of said one conductivity type formed by diffusion from central portions of the surface of said third semiconductor region within the vertical projection of said third semiconductor region and deeper than the first semiconductor region without extending to said portion of said third semiconductor region and said channel region.