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Patent US4780427A successfully refreshed from Google Patents.
US4780427A
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Bipolar transistor and method of manufacturing the same
Assignee: NTT Inc
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Filing: 1987-09-29
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Granted: 1988-10-25
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Expires: 2007-09-29
Abstract
Abstract A bipolar transistor includes collector, base and emitter regions. The collector region consists of a first semiconductor region of a first conductivity type and formed in contact with a surface of a semiconductor layer. The base region consists of a second semiconductor region of a second conductivity type formed within the collector region to be in contact with the surface of the semiconductor layer. The emitter region consists of a third semiconductor region of the first conductivity type formed within the base region to be in contact with the surface of the semiconductor layer. The transistor also includes collector, base, and emitter electrodes. The collector and base electrodes are connected to the collector and base regions at opposite edges of a single opening formed in a field insulating film covering the surface of the semiconductor layer. The collector and base electrodes consist of a conductor. The emitter electrode is connected to the emitter region and consists of a conductor. The transistor further includes first and second insulating interlayers. The first insulating interlayer is formed between the collector and emitter electrodes. The second insulating interlayer is formed between the emitter and base electrodes. A distance between the collector and emitter electrodes on the surface of the semiconductor layer is substantially the same as that between the emitter and base electrodes.
Inventors
- 👤 Tetsushi Sakai
- 👤 Yoshiji Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 20:07
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D64/00; H10D64/20; H10D64/23; H10D64/231; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P76/00; H10P76/40; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
352 words
A method of manufacturing a bipolar transistor, comprising the steps of: forming a first insulating film as a field insulating film on a semiconductor substrate having a collector region of a first conductivity type; forming a first nondoped semiconductor layer on said first insulating film; oxidizing said first nondoped semiconductor layer except for a part over said collector region to form a second insulating film; doping an impurity of a second conductivity type in part of a region of said first nondoped semiconductor layer, thereby forming a first doped region; partially etching a part of a nondoped portion of said first nondoped semiconductor layer which is adjacent to said first doped region and located on said collector region, thereby forming a groove in said first nondoped semiconductor layer; doping an impurity of the first conductivity type to form a second doped region in a region of said first nondoped semiconductor layer which excludes said first doped region; side-etching said first insulating film in the groove excluding a vicinity of said second insulating film to expose parts of lower surfaces of said second doped semiconductor layer of the first conductivity type and said first doped semiconductor layer of the second conductivity type; filling side-etched portions with a second semiconductor layer; doping an impurity of the second conductivity type in a surface of said collector region in the groove to form a base region; forming a third insulating film on the entire surface; forming a third semiconductor layer on the third insulating film; removing said third semiconductor layer except for portions on the side wall of the groove by using anisotropic etching; removing portions of said third insulating film to expose a surface of said base region at the center of the groove; forming a fourth semiconductor layer containing an impurity of the first conductivity type on the surface of said base region and in a region surrounded by remaining portions of said third insulating film and said third semiconductor layer; and diffusing the impurity of the first conductivity type from said fourth semiconductor layer into said base region to form an emitter region.
Claim 2
Independent Claim
352 words
A method of manufacturing a bipolar transistor, comprising the steps of: forming a first insulating film as a field insulating film on a semiconductor substrate having a collector region of a first conductivity type; forming a first nondoped semiconductor layer on said first insulating film; oxidizing said first nondoped semiconductor layer except for a part over said collector region to form a second insulating film; doping an impurity of a second conductivity type in part of a region of said first nondoped semiconductor layer, thereby forming a first doped region; partially etching a part of a nondoped portion of said first nondoped semiconductor layer which is adjacent to said first doped region and located on said collector region, thereby forming a groove in said first nondoped semiconductor layer; doping an impurity of the first conductivity type to form a second doped region in a region of said first nondoped semiconductor layer which excludes said first doped region; side-etching said first insulating film in the groove excluding a vicinity of said second insulating film to expose parts of lower surfaces of said second doped semiconductor layer of the first conductivity type and said first doped semiconductor layer of the second conductivity type; filling side-etched portions with a second semiconductor layer; doping an impurity of the second conductivity type in a surface of said collector region in the groove to form a base region; forming a third insulating film on the entire surface; forming a third semiconductor layer on the third insulating film; removing said third semiconductor layer except for portions on the side wall of the groove by using anisotropic etching; removing portions of said third insulating film to expose a surface of said base region at the center of the groove; forming a fourth semiconductor layer containing an impurity of the first conductivity type on the surface of said base region and in a region surrounded by remaining portions of said third insulating film and said third semiconductor layer; and diffusing the impurity of the first conductivity type from said fourth semiconductor layer into said base region to form an emitter region.
Claim 3
Dependent Claim
30 words
A method according to claim 1, wherein the impurity of the first conductivity type is an n-type impurity, and the impurity of the second conductivity type is a p-type impurity.
Claim 4
Dependent Claim
30 words
A method according to claim 1, wherein the impurity of the first conductivity type is a p-type impurity, and the impurity of the second conductivity type is an n-type impurity.
Claim 5
Dependent Claim
95 words
A method according to claim 1, wherein the step of forming the groove in said first semiconductor layer includes the steps of: forming an oxide film on said first nondoped semiconductor layer; forming a nitride film on said oxide film and patterning said nitride film; etching said oxide film using said nitride film as a mask and partially side-etching said oxide film under said nitride film to partially expose said first nondoped semiconductor layer excluding said first doped region; and partially etching an exposed portion of said first nondoped semiconductor layer to form the groove.
Claim 6
Dependent Claim
22 words
A method according to claim 1, wherein said first insulating film consists of a first oxide film and a first nitride film.
Claim 7
Dependent Claim
25 words
A method according to claim 1, wherein said semiconductor layers are made of a material selected from the group consisting of polysilicon and a silicide.
Claim 8
Independent Claim
352 words
A method of manufacturing a bipolar transistor, comprising the steps of: forming a first insulating film as a field insulating film on a semiconductor substrate having a collector region of a first conductivity type; forming a first nondoped semiconductor layer on said first insulating film; oxidizing said first nondoped semiconductor layer except for a part over said collector region to form a second insulating film; doping an impurity of a first conductivity type in part of a region of said first nondoped semiconductor layer, thereby forming a first doped region; partially etching a pair of a nondoped portion of said first nondoped semiconductor layer which is adjacent to said first doped region and located on said collector region, thereby forming a groove in said first nondoped semiconductor layer; doping an impurity of the second conductivity type to form a second doped region in a region of said first nondoped semiconductor layer which excludes said first doped region; side-etching said first insulating film in the groove excluding a vicinity of said second insulating film to expose parts of lower surfaces of said second doped semiconductor layer of the first conductivity type and said first doped semiconductor layer of the second conductivity type; filling side-etched portions with a second semiconductor layer; doping an impurity of the second conductivity type in a surface of said collector region in the groove to form a base region; forming a third insulating film on the entire surface; forming a third semiconductor layer on the third insulating film; removing said third semiconductor layer except for portions on the side wall of the groove by using anisotropic etching; removing portions of said third insulating film to expose a surface of said base region at the center of the groove; forming a fourth semiconductor layer containing an impurity of the first conductivity type on the surface of said base region and in a region surrounded by remaining portions of said third insulating film and said third semiconductor layer; and diffusing the impurity of the first conductivity type from said fourth semiconductor layer into said base region to form an emitter region.
Claim 9
Independent Claim
352 words
A method of manufacturing a bipolar transistor, comprising the steps of: forming a first insulating film as a field insulating film on a semiconductor substrate having a collector region of a first conductivity type; forming a first nondoped semiconductor layer on said first insulating film; oxidizing said first nondoped semiconductor layer except for a part over said collector region to form a second insulating film; doping an impurity of a first conductivity type in part of a region of said first nondoped semiconductor layer, thereby forming a first doped region; partially etching a pair of a nondoped portion of said first nondoped semiconductor layer which is adjacent to said first doped region and located on said collector region, thereby forming a groove in said first nondoped semiconductor layer; doping an impurity of the second conductivity type to form a second doped region in a region of said first nondoped semiconductor layer which excludes said first doped region; side-etching said first insulating film in the groove excluding a vicinity of said second insulating film to expose parts of lower surfaces of said second doped semiconductor layer of the first conductivity type and said first doped semiconductor layer of the second conductivity type; filling side-etched portions with a second semiconductor layer; doping an impurity of the second conductivity type in a surface of said collector region in the groove to form a base region; forming a third insulating film on the entire surface; forming a third semiconductor layer on the third insulating film; removing said third semiconductor layer except for portions on the side wall of the groove by using anisotropic etching; removing portions of said third insulating film to expose a surface of said base region at the center of the groove; forming a fourth semiconductor layer containing an impurity of the first conductivity type on the surface of said base region and in a region surrounded by remaining portions of said third insulating film and said third semiconductor layer; and diffusing the impurity of the first conductivity type from said fourth semiconductor layer into said base region to form an emitter region.
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