Vector processing apparatus including means for identifying the occurrence of exceptions in the processing of vector elements

Claim 1

A vector processing apparatus having vector registers and a plurality of functional facilities capable of operating concurrently and intended to process vectors having a larger number of vector elements than a vector register has the capacity to store, each functional facility having means for detecting an exception relating to its operation, said apparatus comprising: means for holding information in correspondence to each of said functional facilities, including the address of an instruction under process by that functional facility, leading vector element position information for a vector element to be processed by said instruction and a vector register internal address of a vector element at which an exception has been detected by said functional facility; and means for reading out the information in said holding means in response to a signal indicating detection of an exception from any functional facility and for selecting information corresponding to one of said functional facilities in accordance with a predetermined rule.