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US4774203A
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Method for making static random-access memory device
Assignee: Hitachi Ltd
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Filing: 1986-08-22
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Granted: 1988-09-27
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Expires: 2006-08-22
Abstract
Abstract A method of making a static random-access memory device or SRAM including a memory cell having a high-resistance load element. The load element is formed from a polysilicon film, and an impurity is introduced into at least a part of the polysilicon film for the purpose of increasing the threshold voltage of a parasitic MISFET formed using the load element as its channel region. Alternatively, the deposition of the polysilicon film is carried out at a relatively high temperature, thereby preventing any increase in the current flowing through the load element, and thus reducing the power dissipation in the SRAM.
Inventors
- 👤 Shuji Ikeda
- 👤 Satoshi Meguro
- 👤 Kotaro Nishimura
- 👤 Sho Yamamoto
- 👤 Nobuyoshi Tanimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:45
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15; H10D; H10D1/00; H10D1/40; H10D1/47; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
131 words
A method of producing a semiconductor memory device having a memory cell including a flip-flop composed of first and second inverters, the output terminals of said first and second inverters being respectively connected to the input terminals of said second and first inverters, each of said first and second inverters being constituted by a MISFET and a load element which is connected in series to said MISFET and which is defined by a polysilicon film, said method comprising the steps of: depositing said polysilicon film; forming a mask over said polysilicon film; and introducing impurities of first and second conductivity types into said polysilicon film using said mask, said impurity of the first conductivity type being introduced at a higher concentration than that of said impurity of the second conductivity type.
Claim 2
Independent Claim
131 words
A method of producing a semiconductor memory device having a memory cell including a flip-flop composed of first and second inverters, the output terminals of said first and second inverters being respectively connected to the input terminals of said second and first inverters, each of said first and second inverters being constituted by a MISFET and a load element which is connected in series to said MISFET and which is defined by a polysilicon film, said method comprising the steps of: depositing said polysilicon film; forming a mask over said polysilicon film; and introducing impurities of first and second conductivity types into said polysilicon film using said mask, said impurity of the first conductivity type being introduced at a higher concentration than that of said impurity of the second conductivity type.
Claim 3
Independent Claim
90 words
A method of producing a semiconductor memory device having a memory cell including a flip-flop composed of first and second inverters, the output terminals of said first and second inverters being respectively connected to the input terminals of said second and first inverters, each of said first and second inverters being constituted by a MISFET and a load element which is connected in series to said MISFET and which is defined by a polysilicon film, said polysilicon film being formed by CVD at a temperature of 600° C. or higher.
Claim 4
Independent Claim
90 words
A method of producing a semiconductor memory device having a memory cell including a flip-flop composed of first and second inverters, the output terminals of said first and second inverters being respectively connected to the input terminals of said second and first inverters, each of said first and second inverters being constituted by a MISFET and a load element which is connected in series to said MISFET and which is defined by a polysilicon film, said polysilicon film being formed by CVD at a temperature of 600° C. or higher.
Claim 5
Dependent Claim
28 words
A method of producing a semiconductor memory device according to claim 2, wherein said polysilicon film is formed by CVD at a temperature of 700° C. or lower.
Claim 6
Dependent Claim
25 words
A method of producing a semiconductor memory device according to claim 3, wherein said polysilicon film has a thickness of about 1000 Å or less.
Claim 7
Dependent Claim
114 words
A method of producing a semiconductor memory device according to claim 2, wherein said polysilicon film including a first region of a first conductivity type, a second region of a second conductivity type, and a third region having no impurities of said first and second conductivity types introduced therein and defining said load element, said first region being formed on the side of said polysilicon film which is closer to the end thereof to which a power supply voltage is applied than at least said second and third regions, and said second region being formed on the side of said polysilicon film which is closer to said MISFET than at least said third region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-09-27 | 1992-03-28 | 1992-09-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-09-27 | 1996-03-28 | 1996-09-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-09-27 | 2000-03-28 | 2000-09-27 | $7700.00 | Window Closed / Lapsed |