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US4772932A Expired / Lapsed US ⏱️ 0.0 years remaining

Bipolar transistor and including gas layers between the emitter and base and the base and collector

Assignee: Sony Corp
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Filing: 1985-12-23
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Granted: 1988-09-20
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Expires: 2005-12-23
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Abstract

Abstract A semiconductor device according to the invention comprises: a first semiconductor layer having a low impurity concentration formed on a semiconductor substrate; a second semiconductor layer of a first conductivity type formed on the first semiconductor layer and forming a heterojunction therewith; an emitter region and a collector region formed in the first and second semiconductor layers; and a semiconductor region of a second conductivity type formed in at least the second semiconductor layer between the emitter region and the collector region, wherein two-dimensional electron gas layers, induced in portions of the first semiconductor layer adjacent to the heterojunction and between the emitter region and the semiconductor region and between the collector region and the semiconductor region, are used as current paths, and a virtual base region is formed in the first semiconductor layer below the semiconductor region by majority carriers injected from the semiconductor region into the first semiconductor layer by forward biasing the emitter region and the semiconductor region, thereby enabling a bipolar transistor operation with two dimensional electron gas layers.

Inventors

  • 👤 Kou Togashi
  • 👤 Yoji Kato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 01:59
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D62/184; H10D10/00; H10D10/60; H10D12/00

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 163 words
A semiconductor device comprising: a first semiconductor layer having a low impurity concentration formed on a semiconductor substrate; a second semiconductor layer of a first conductivity type formed on said first semiconductor layer and forming a heterojunction therewith; an emitter region and a collector region formed in said first and second semiconductor layers; and a semiconductor region of a second conductivity type formed in at least said second semiconductor layer between said emitter region and said collector region, wherein two-dimensional electron gas layers, induced in portions of said first semiconductor layer adjacent to said heterojunction and between said emitter region and said semiconductor region and between said collector region and said semiconductor region, are used as current paths, and a virtual base region is formed in said first semiconductor layer below said semiconductor region by majority carriers injected from said semiconductor region into said first semiconductor layer by forward biasing said emitter region and said semiconductor region, thereby enabling a bipolar transistor operation.
Claim 2
Dependent Claim 163 words
A semiconductor device comprising: a first semiconductor layer having a low impurity concentration formed on a semiconductor substrate; a second semiconductor layer of a first conductivity type formed on said first semiconductor layer and forming a heterojunction therewith; an emitter region and a collector region formed in said first and second semiconductor layers; and a semiconductor region of a second conductivity type formed in at least said second semiconductor layer between said emitter region and said collector region, wherein two-dimensional electron gas layers, induced in portions of said first semiconductor layer adjacent to said heterojunction and between said emitter region and said semiconductor region and between said collector region and said semiconductor region, are used as current paths, and a virtual base region is formed in said first semiconductor layer below said semiconductor region by majority carriers injected from said semiconductor region into said first semiconductor layer by forward biasing said emitter region and said semiconductor region, thereby enabling a bipolar transistor operation.
Claim 3
Dependent Claim 31 words
A semiconductor device according to claim 1, wherein said first semiconductor layer is an undoped GaAs layer and said second semiconductor layer is an n-type Al x Ga 1-x As layer.
Claim 4
Dependent Claim 23 words
A semiconductor device according to claim 2, wherein a composition ratio x of said n-type Al x Ga 1-x As layer is 0.3.
Claim 5
Dependent Claim 22 words
A semiconductor device according to claim 1 or 2 or 3, wherein said emitter region and said collector region comprise alloy layers.
Claim 6
Dependent Claim 27 words
A semiconductor device according to claim 2 or 3, wherein an Al x Ga 1-x As layer is provided between said semiconductor substrate and said GaAs layer.
Claim 7
Dependent Claim 19 words
A semiconductor device according to claim 1 or 2 or 3, wherein said semiconductor substrate is a GaAs substrate.

References Cited (Backward Citations)

JPS5893380A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-09-20 1992-03-21 1992-09-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-09-20 1996-03-21 1996-09-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-09-20 2000-03-21 2000-09-20 $7700.00 Window Closed / Lapsed

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