Method for producing circuit boards

Claim 1

In a method for producing printed circuit boards having at least two planes of conductor patterns, in the course of which method there is first prepared the conductor pattern of the first plane which is subsequently provided with a layer of insulating mask, leaving exposed those points of the conductor patterns of the first plane for build up of connections with the corresponding conductor patterns of a next-following plane of conductor patterns, and there are subsequently prepared the conductor patterns of the second plane by an action of metal deposition, in the course of which metal deposition the simultaneously formed metal deposition coating causes at the exposed points not covered by the masking layer and hereinafter referred to as the "first window" of the conductor patterns of the first plane of conductor patterns, interconnects the corresponding conductor patterns of the two planes at each of said windows in said conductor patterns, characterized by the fact that following the application and drying of the insulation mask layer there is applied over such mask layer a layer of a butadiene nitrile rubber modified phenolic resin adhesive capable of being rendered microporous, polar and wettable by a subsequent treatment, said adhesive layer being applied across the edges of each of the said first windows in the masking layer and onto the metal surface of the respective conductor patterns but leaving, at each of said first windows, a second, smaller window on the exposed metal surface of the conductor patterns, subsequently treating said adhesive layer with an alkaline permanganate solution and rendering said adhesive layer microporous and wettable without attacking the metal of the conductor patterns to any interfering extent and depositing on said treated adhesive layer and the exposed metal surface of the conductor patterns a metal deposition to form a second conductor pattern on said adhesive layer interconnected at said second, smaller windows to the first conductor patterns.

Claim 5

The method, as defined in any one of claims 1 to 3, characterized by the fact that the dry film of the masking layer composed of dielectric material is present with a thickness of from 30 to 100 μm.

Claim 6

The method, as defined in any one of claims 1 to 3, characterized by the facts that the dry film of the masking layer composed of dielectric material is present with a thickness of from 30 to 100 μm and the adhesive layer has a thickness of from 10 to 50 μm.

Claim 7

The method, as defined in any one of claims 1 to 3, characterized by the facts that the dry film of the masking layer composed of dielectric material is present with a thickness of from 30 to 100 μm, the adhesive layer has a thickness of from 10 to 50 μm and the masking layer has a thickness of 50 μm and the adhesive layer has a thickness of 20 μm.

Claim 8

The method, as defined in any one of claims 1 to 3, characterized by the facts that the dry film of the masking layer composed of dielectric material is present with a thickness of from 30 to 100 μm, the adhesive layer has a thickness of from 10 to 50 μm, the masking layer has a thickness of 50 μm, the adhesive layer has a thickness of 20 μm and the adhesive layer contains a substance for catalytically initiating on its surface the currentless depositon of metal from metal bath solutions.

Claim 9

The method, as defined in any one of claims 1 to 3, characterized by the fact that the electroless formed layer is first reinforced galvanically and that a galvanic bath with high leveling capability is used for building up the conductor patterns.

Claim 10

The method, as defined in any one of claims 1 to 3, characterized by the fact that all planes of conductor patterns are arranged exclusively on one side of the initial material for the circuit board and that in the step of galvanic metal deposition two circuit boards are in each case disposed with their sides free of conductor patterns facing each other.

Claim 11

The method, as defined in at least one of claims 1 to 3, characterized by the fact that holes with metallized hole walls are prepared simultaneously with the build-up of the conductor patterns of one plane and the connection to the conductor patterns of the next plane, said holes serving as holes for mounting components or as the connection of circuit patterns disposed on different sides of the initial material or for both said purposes.

Claim 12

The method, according to at least one of claims 1 to 3, characterized by the fact that conductor patterns with a relative low density are used for the planes of conductor patterns disposed adjacent the surface of the initial material, and that a higher density of conductor patterns is selected for the next plane or for a number of planes of conductor patterns exceeding two and built up in each case later.