Process for determination of the last intermediate node in a network of numerous interconnected nodes

Claim 2

In a network of p nodes interconnected by a number of links, p being a positive whole number, a method for determining the last intermediate node of a pathway from the m-th node to the n-th node through the minimum possible number of nodes, said method being especially useful for communications routing between interconnected computers and between interconnected telephone switchboard systems and comprising the steps of: (a) electronically determining all direct links between nodes of said network; (b) electronically establishing a square matrix R 1 =∥a ij ∥ p p and storing the matrix R 1 in a memory device, a ij being assigned a value of zero if there is no direct link between the i-th node and the j-th node of the network and being assigned a non-zero value if there is such a direct link, (c) determining whether there is a two-link pathway from the m-th node to the n-th node by electronically comparing elements of equal rank in the m-th row and n-th column of the matrix R 1 , the existence of non-zero elements of equal rank indicating the presence of a two-link pathway and the rank of such non-zero elements indicating the location of an intermediate node of that pathway; and (d) in the absence of a two-link pathway, iterating the following steps over all q from 2 to p-2 until a pathway of q+1 links from the m-th node to the n-th node has been determined: (1) electronically establishing elements of the square matrix X q =∥x ij ∥ p p , which is the product of the matrices R q-1 and R 1 ; (2) electronically establishing elements of the square matrix R q =∥b ij ∥ p p , b ij being assigned a non-zero value if one of x ij and a ij is non-zero and being assigned a value of zero if x ij and a ij are both zero, and (3) electronically comparing elements of equal rank in the m-th row of matrix R q and the n-th column of matrix R 1 , the existence of non-zero elements of the same rank indicating the presence of said pathway of q+1 links from the m-th node to the n-th node and the rank of such non-zero elements indicating the identity of the last intermediate node of such pathway.

Claim 3

The method of claim 1, wherein only elements of the square matrix X q corresponding to zero elements of matrix R q-1 are established.

Claim 4

The method of claim 1, wherein if the links of said network are not directional, elements of matrix X q are established only for values i<j or for values j<i.

Claim 5

The method of claim 1, wherein only elements of the m-th rows of matrices X q and R q are established for q≧2.

Claim 6

The method of claim 1, wherein the intermediate nodes of said pathway which precede said last intermediate node are determined in reverse succession by repeating steps (c) through (d) (3) as necessary first with respect to said last intermediate node and then with respect to each successively determined preceding node until all preceding intermediate nodes of said pathway have been determined.

Claim 7

The method of claim 5, wherein only elements of matrix X q corresponding to zero value elements of matrix R q-1 are established.

Claim 8

The method of claim 6, wherein if the links of said network are not directional, elements of matrix X q are established only for values i<j or values j<i.

Claim 9

The method of claim 5, wherein only elements of the m-th rows of matrices X q and R q are established for q≧2.

Claim 10

A method for establishing a localized routing table, comprising repeating the method of claim 5 up to p-2 times for each possible pathway traversing the minimum number of nodes from the m-th node to the n-node of said network, the resulting table being local to the m-th node and including an indication of the first intermediate node of each such possible pathway.

Claim 11

The method of claim 9, comprising repeating all of the aforesaid steps to update said table when the network configuration changes.

Claim 12

A method for establishing a general network routing table, comprising conducting the method of claim 9 for each node of the network.

Claim 13

In a network, such as a network of interconnected computers or a network of interconnected telephone switchboard systems, having p nodes interconnected by a number of links, p being a positive whole number, apparatus for determining the last intermediate node of a pathway from the m-th node to the n-th node of the network through the minimum possible number of nodes, comprising: detector means for detecting all direct links between nodes of said network; circuit means connected to said detector means for establishing a square matrix R 1 =∥a ij ∥ p p , with a ij being assigned a value of zero if there is no direct link from the i-th node to the j-th node of the network and being assigned a non-zero value if such a direct link exists; memory means connected to said circuit means for storing elements of said matrix R 1 ; memory reading means connected with comparison means for determining whether there is a two-link pathway from the m-th node to the n-th node if a direct link therebetween does not exist, by comparing elements of equal rank in the m-th row and the n-th column of matrix R1, with the existence of non-zero elements of equal rank in the m-th row and n-th column of matrix R1 indicating the presence of said two-link pathway and the rank of such non-zero elements indicating the intermediate node of said two-link pathway, and means operable in the absence of such non-zero elements for determining by iteration over whole numbers q varying from 2 to p-2 whether a pathway of q+1 links exists from the m-th node to the n-th node, including calculating circuit means for calculating elements of the square matrix X q =∥x ij ∥ p p which is the product of matrices R q-1 and R 1 , matrix determining circuit means connected to said calculating circuit circuit means connected to said calculating circuit means for determining elements of the square matrix R q =∥b ij ∥ p p such that b ij =0 if x ij and a ij are both zero and b ij ≠0 if x ij or a ij is other than zero, and means connected to said matrix determining circuit means and to said memory means for comparing elements of equal rank in the m-th row of matrix R q and the n-th column of matrix R 1 , the existence of non-zero elements of equal rank in the n-th row of matrix R q and the n-th column of matrix R 1 indicating the presence of said pathway of q+1 links and the rank of such non-zero elements indicating the last intermediate node of said pathway of q+1 links.

Claim 14

In a network, such as a network of interconnected computers or a network of interconnected telephone switchboard systems, having p nodes interconnected by a number of links, p being a positive whole number, apparatus for determining the last intermediate node of a pathway from the m-th node to the n-th node of the network through the minimum possible number of nodes, comprising: detector means for detecting all direct links between nodes of said network; circuit means connected to said detector means for establishing a square matrix R 1 =∥a ij ∥ p p , with a ij being assigned a value of zero if there is no direct link from the i-th node to the j-th node of the network and being assigned a non-zero value if such a direct link exists; memory means connected to said circuit means for storing elements of said matrix R 1 ; memory reading means connected with comparison means for determining whether there is a two-link pathway from the m-th node to the n-th node if a direct link therebetween does not exist, by comparing elements of equal rank in the m-th row and the n-th column of matrix R1, with the existence of non-zero elements of equal rank in the m-th row and n-th column of matrix R1 indicating the presence of said two-link pathway and the rank of such non-zero elements indicating the intermediate node of said two-link pathway, and means operable in the absence of such non-zero elements for determining by iteration over whole numbers q varying from 2 to p-2 whether a pathway of q+1 links exists from the m-th node to the n-th node, including calculating circuit means for calculating elements of the square matrix X q =∥x ij ∥ p p which is the product of matrices R q-1 and R 1 , matrix determining circuit means connected to said calculating circuit circuit means connected to said calculating circuit means for determining elements of the square matrix R q =∥b ij ∥ p p such that b ij =0 if x ij and a ij are both zero and b ij ≠0 if x ij or a ij is other than zero, and means connected to said matrix determining circuit means and to said memory means for comparing elements of equal rank in the m-th row of matrix R q and the n-th column of matrix R 1 , the existence of non-zero elements of equal rank in the n-th row of matrix R q and the n-th column of matrix R 1 indicating the presence of said pathway of q+1 links and the rank of such non-zero elements indicating the last intermediate node of said pathway of q+1 links.

Claim 15

Apparatus according to claim 12, wherein said calculating circuit means calculates only elements of matrix X q which correspond to zero elements of matrix R q-1 .

Claim 16

Apparatus according to claim 12, wherein if the links of said network are not directional, said calculating circuit means calculates elements of matrix X q only for values i<j or for values j<i.

Claim 17

Apparatus according to claim 12, wherein said calculating circuit means calculates only elements of the m-th rows of matrices X q and R q for values of q≧2.

Claim 18

In a network, such as a network of interconnected computers or a network of interconnected telephone switchboard systems, having p nodes interconnected by a number of links, p being a positive whole number, apparatus for determining a localized routing table for the m-th node of the network, which table includes the adresses of the respective first nodes of pathways from the m-th node to the other nodes n of the network through the smallest possible numbers of intermediate nodes, said apparatus comprising: detector means for determining all direct links between nodes of said network; first circuit means connected to said detector means for establishing a square matrix R 1 =∥a ij ∥ p p such that a ij =0 if there is no direct link from the i-th node to the j-th node and a ij ≠0 if such a direct link exists; node determining means including memory means connected to said first circuit means for storing elements of matrix R 1 and elements of the m-th row of a matrix R q , q being a positive whole number initially equal to 1, memory-read/comparison means connected to said memory means and operable to compare elements of equal rank in the m-th row of matrix R q and for another node n the n-th column of matrix R 1 , with the existence of non-zero elements of equal rank indicating the existence of a pathway of q+1 links from the m-th node to the n-th node and the rank of such non-zero elements indicating the address of the last intermediate node of said pathway of q+1 links, and means coupled to an output of said memory-read/comparison means and to an input of said memory means for incrementing q by a count of 1 in the absence of such non-zero elements for a given node n and a given q and including calculating circuit means for calculating elements of the square matrix X q =∥x ij ∥ p p which is equal to the product of matrices R q-1 and R 1 and matrix determining circuit means for determining elements of the square matrix R q =∥b ij ∥ p p such that b ij ≠0 if x ij or a ij is other than zero and b ij =0 if x ij and a ij are both zero; second circuit means connected to said node determining means for causing said node determining means to determine in reverse succession each node preceding said last intermediate node in said pathway in the same manner as said last intermediate node was determined, until the first intermediate node of said pathway has been determined; and storage means connected to an output of said second circuit means for storing addresses of first intermediate nodes determined as aforesaid.

Claim 19

In a network, such as a network of interconnected computers or a network of interconnected telephone switchboard systems, having p nodes interconnected by a number of links, p being a positive whole number, apparatus for determining a localized routing table for the m-th node of the network, which table includes the adresses of the respective first nodes of pathways from the m-th node to the other nodes n of the network through the smallest possible numbers of intermediate nodes, said apparatus comprising: detector means for determining all direct links between nodes of said network; first circuit means connected to said detector means for establishing a square matrix R 1 =∥a ij ∥ p p such that a ij =0 if there is no direct link from the i-th node to the j-th node and a ij ≠0 if such a direct link exists; node determining means including memory means connected to said first circuit means for storing elements of matrix R 1 and elements of the m-th row of a matrix R q , q being a positive whole number initially equal to 1, memory-read/comparison means connected to said memory means and operable to compare elements of equal rank in the m-th row of matrix R q and for another node n the n-th column of matrix R 1 , with the existence of non-zero elements of equal rank indicating the existence of a pathway of q+1 links from the m-th node to the n-th node and the rank of such non-zero elements indicating the address of the last intermediate node of said pathway of q+1 links, and means coupled to an output of said memory-read/comparison means and to an input of said memory means for incrementing q by a count of 1 in the absence of such non-zero elements for a given node n and a given q and including calculating circuit means for calculating elements of the square matrix X q =∥x ij ∥ p p which is equal to the product of matrices R q-1 and R 1 and matrix determining circuit means for determining elements of the square matrix R q =∥b ij ∥ p p such that b ij ≠0 if x ij or a ij is other than zero and b ij =0 if x ij and a ij are both zero; second circuit means connected to said node determining means for causing said node determining means to determine in reverse succession each node preceding said last intermediate node in said pathway in the same manner as said last intermediate node was determined, until the first intermediate node of said pathway has been determined; and storage means connected to an output of said second circuit means for storing addresses of first intermediate nodes determined as aforesaid.

Claim 20

Apparatus according to claim 16, wherein said second circuit means operates to cause said node determining means to determine the first intermediate node of each pathway from the m-th node to each other node n through the smallest possible number of links, and including selector/storage circuit means coupled to said storage means for selecting and storing the first intermediate node of one such pathway for each node n.