Speech scrambler

Claim 2

A speech scrambler comprising an input terminal for voice signals, an A/D converter for converting a signal received at the input terminal into a digital signal, an FFT circuit for transforming the digital signal into a frequency domain signal, a dummy sprectrum insertion circuit for dividing a spectrum obtained by said FFT circuit into a plurality of blocks each comprised of consecutive FFT coefficients and calculating as a function of the FFT coefficients from the FFT circuit the total energy of each block so that blocks having energy below a given threshold energy value are replaced by a corresponding dummy spectrum, a spectrum rearrangement circuit receptive of the frequency domain signal with dummy spectra and for rearranging the frequency domain signal blocks in accordance with a given rule, a spectrum rearrangement control circuit for determining said rule, an IFFT circuit receptive of the rearranged frequency domain signal and for transforming it into a time domain signal, a D/A converter for converting said time domain signal into an analog signal, a synchronous signal generator for generating a synchronizing signal, a signal combiner for combining into a combined signal, the last mentioned analog signal and the synchronizing signal, and an output terminal for outputting said combined signal.

Claim 3

A speech scrambler according to claim 1, in which, the dummy spectrum insertion circuit comprises, an energy calculator receptive of the output of the FFT circuit for calculating the total energy of each block of the original voice spectrum and deciding whether to replace the block by a dummy spectrum, a dummy spectrum generator for generating a dummy spectrum having an amount of energy within a certain value, a random number generator for generating random numbers within a given range in correspondence to the values of the coefficient, and a selector for selecting the output of the FFT circuit or output of the dummy spectrum generator under control of the energy calculator as output of the dummy spectrum insertion circuit.

Claim 4

A speech scrambler according to claim 1, including a timing pulse generator for generating timing pulses for timing the circuit of the speech scrambler.

Claim 5

For use in combination with said speech scrambler according to claim 1, a receiver having an input terminal for receiving the combined signal output of the speech scrambler, a filter for removing the synchronization signal from the combined signal received, an A/D converter for converting the combined signal received from the filter into a combined digital signal, an FFT circuit for converting the combined digital signal into a frequency domain signal, a spectrum rearrangement circuit for rearranging the frequency domain signal to a same spectrum order as the order thereof in the scrambler, a dummy spectrum removing circuit for checking whether the spectrum of each block is a dummy spectrum and for replacing each dummy spectrum by a spectrum whose coefficients are all zero, an IFFT circuit for converting the signal into a time domain signal, a D/A converter for converting the time domain signal into an analog signal, an output terminal for outputting the analog signal, and a timing pulse generator for generating dummy pulses applied for timing the circuits.

Claim 6

The receiver according to claim 4, in which said dummy spectrum removing circuit comprises a dummy spectrum decision circuit for calculating correlation between FFT coefficients in each block, for deciding the signal spectrum to be a dummy and replacing the dummy spectrum by a replacement spectrum of all zero coefficients when the correlation is smaller than a predetermined value, a zero coefficient spectrum generator, and a selector for selecting of application of the replacement spectrum or not to the IFFT circuit.

Claim 7

A speech scrambling system comprising a speech scrambler having an input terminal for voice signals, an A/D converter for converting a voice signal received into a digital signal, an orthogonal transform circuit for effecting an orthogonal transformation of the digital signal into a frequency domain signal, a dummy spectrum insertion circuit for dividing a spectrum obtained by said orthogonal transform circuit into a plurality of blocks each comprised of consecutive orthogonal transform coefficients and calculating as a function of the FFT coefficients from the FFT circuit the total energy of each block so that the individual blocks having energy below a given threshold energy value are replaced by a corresponding dummy spectrum, a spectrum rearrangement circuit receptive of the frequency with dummy spectra and for rearranging the frequency domain signal blocks in accordance with a given rule, a spectrum rearrangement control circuit for determining said rule, a fast transform circuit receptive of the rearranged frequency domain and for transforming it into a time domain signal, a D/A converter for converting said time domain signal into an analog circuit, a synchronous signal generator for generating a synchronizing signal, a signal combiner for combining into a combined signal the last mentioned analog signal and the synchronizing signal, and an output terminal for outputting said combined signal.

Claim 8

A speech scrambling system comprising a speech scrambler having an input terminal for voice signals, an A/D converter for converting a voice signal received into a digital signal, an orthogonal transform circuit for effecting an orthogonal transformation of the digital signal into a frequency domain signal, a dummy spectrum insertion circuit for dividing a spectrum obtained by said orthogonal transform circuit into a plurality of blocks each comprised of consecutive orthogonal transform coefficients and calculating as a function of the FFT coefficients from the FFT circuit the total energy of each block so that the individual blocks having energy below a given threshold energy value are replaced by a corresponding dummy spectrum, a spectrum rearrangement circuit receptive of the frequency with dummy spectra and for rearranging the frequency domain signal blocks in accordance with a given rule, a spectrum rearrangement control circuit for determining said rule, a fast transform circuit receptive of the rearranged frequency domain and for transforming it into a time domain signal, a D/A converter for converting said time domain signal into an analog circuit, a synchronous signal generator for generating a synchronizing signal, a signal combiner for combining into a combined signal the last mentioned analog signal and the synchronizing signal, and an output terminal for outputting said combined signal.

Claim 9

A speech scrambling system comprising a speech scrambler according to claim 6, in which the orthogonal transform circuit is a fast Fourier transform circuit.

Claim 10

A speech scrambling system comprising a speech scrambler according to claim 6, in which the orthogonal transform circuit is a fast Hadamard transform circuit.

Claim 11

A speech scrambling system comprising a speech scrambler according to claim 6, including a receiver having an input terminal for receiving the combined signal output of the speech scrambler, a filter for removing the synchronization signal from the combined signal received, an A/D converter for converting the combined signal received from the filter into a combined digital signal, an orthogonal transform circuit for effecting an orthogonal transformation of the combined digital signal into a frequency domain signal, a spectrum rearrangement circuit for rearranging the frequency domain signal to a same spectrum order as the order thereof in the scrambler, a dummy spectrum removing circuit for checking whether the spectrum of each block is a dummy spectrum and for replacing each dummy spectrum by a spectrum whose coefficients are all zero, a fast transform circuit for converting the signal into a time domain signal, a D/A converter for converting the time domain signal into an analog signal, an output terminal for outputting the analog signal, and a timing pulse generator for generating timing pulses applied for timing the circuits.

Claim 12

For use in combination with said speech scrambler according to claim 1, a receiver comprising, an input terminal for receiving the combined signal output of the speech scrambler, a filter for removing the synchronization signal from the combined signal received, an A/D converter for converting the combined signal received from the filter into a combined digital signal, an FFT circuit for converting the combined digital signal into a frequency domain signal, a spectrum rearrangement circuit for rearranging the frequency domain signal to a same spectrum order thereof in the scrambler, a dummy spectrum removing circuit for checking whether the spectrum of each block is a dummy spectrum by comparing the coefficients of the spectrum with threshold values and for replacing each dummy spectrum by a spectrum whose coefficients are all zero, an IFFT circuit for converting the time domain signal into an analog signal, an output terminal for outputting the analog signal, and a timing pulse generator for generating dummy pulses applied for timing the circuits.