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US4745089A
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Self-aligned barrier metal and oxidation mask method
Assignee: Intersil Corp
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Filing: 1987-06-11
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Granted: 1988-05-17
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Expires: 2007-06-11
Abstract
Abstract A method for using a self-aligned electromigration barrier metal and flow oxidation mask utilizing titanium nitride as the preferred embodiment. After providing a metallic mask layer, contact openings in a semiconductor substrate are sputtered with suitable metal (in the preferred embodiment, titanium) in a suitable atmosphere (in the present embodiment, nitrogen) to deposit a thin layer of material at the exposed junction sites. This deposited material serves as a barrier to spiking with an overlying metallic interconnect layer, improves contact adherence, and serves as an oxidation mask during subsequent high temperature flow processing steps. The metallic mask layer is removed, and optionally an interlevel oxide layer is flowed to provide a better contact between a subsequent metallic interconnect level and the barrier metal/oxidation mask material. After any flow step, a metallic contact layer may be formed to the silicon junction through the barrier metal/oxidation mask material. Thereafter, standard processing of the substrate may continue. The barrier metal/oxidation mask eliminates spiking of semiconductor juctions by metallic interconnect layers, provides a good contact interface, and protects semiconductor junctions from formation of an oxide layer during a flow process.
Inventors
- 👤 Richard A. Orban
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:32
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/40; H10P14/418; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/106; Y10S438/00; Y10S438/942; Y10S438/945
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
145 words
A method for forming a self-aligned barrier layer for use in the manufacture of at least one electronic device on a semiconductor substrate, comprising at least the steps of: a. forming an insulating layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating layer, thereby exposing part of the underlying substrate; g. depositing barrier material on the exposed substrate; h. removing the remainder of the metallic layer; and i. depositing a metallic contact layer over the insulating layer and in contact with the barrier material.
Claim 2
Independent Claim
145 words
A method for forming a self-aligned barrier layer for use in the manufacture of at least one electronic device on a semiconductor substrate, comprising at least the steps of: a. forming an insulating layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating layer, thereby exposing part of the underlying substrate; g. depositing barrier material on the exposed substrate; h. removing the remainder of the metallic layer; and i. depositing a metallic contact layer over the insulating layer and in contact with the barrier material.
Claim 3
Dependent Claim
11 words
The method of claim 1, wherein the semiconductor substrate comprises silicon.
Claim 4
Dependent Claim
12 words
The method of claim 1, wherein the insulating layer comprises silicon oxide.
Claim 5
Dependent Claim
12 words
The method of claim 1, wherein the metallic contact layer comprises aluminum.
Claim 6
Dependent Claim
16 words
The method of claim 1, wherein the barrier material comprises approximately 85% tungsten and 15% titanium.
Claim 7
Dependent Claim
12 words
The method of claim 1, wherein the barrier material comprises titanium nitride.
Claim 8
Dependent Claim
28 words
The method of claim 6, wherein the titanium nitride barrier material is formed by the step of sputtering titanium onto the exposed substrate in a nitrogen ambient atmosphere.
Claim 9
Dependent Claim
20 words
The method of claim 6, wherein the titanium nitride barrier material is deposited to a thickness of approximately 1000 angstroms.
Claim 10
Independent Claim
159 words
A method for forming a self-aligned barrier layer and oxidation mask for use in the manufacture of at least one electronic device on a semiconductor substrate, comprising at least the steps of: a. forming an insulating layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating layer, thereby exposing part of the underlying substrate; g. depositing barrier material on the exposed substrate; h. removing the remainder of the metallic layer; i. flowing the exposed insulating layer to prevent stress point sites; and j. depositing a metallic contact layer over the insulating layer and in contact with the barrier material.
Claim 11
Independent Claim
159 words
A method for forming a self-aligned barrier layer and oxidation mask for use in the manufacture of at least one electronic device on a semiconductor substrate, comprising at least the steps of: a. forming an insulating layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating layer, thereby exposing part of the underlying substrate; g. depositing barrier material on the exposed substrate; h. removing the remainder of the metallic layer; i. flowing the exposed insulating layer to prevent stress point sites; and j. depositing a metallic contact layer over the insulating layer and in contact with the barrier material.
Claim 12
Dependent Claim
11 words
The method of claim 9, wherein the semiconductor substrate comprises silicon.
Claim 13
Dependent Claim
12 words
The method of claim 9, wherein the insulating layer comprises silicon oxide.
Claim 14
Dependent Claim
12 words
The method of claim 9, wherein the metallic contact layer comprises aluminum.
Claim 15
Dependent Claim
16 words
The method of claim 9, wherein the barrier material comprises approximately 85% tungsten and 15% titanium.
Claim 16
Dependent Claim
12 words
The method of claim 9, wherein the barrier material comprises titanium nitride.
Claim 17
Dependent Claim
28 words
The method of claim 14, wherein the titanium nitride barrier material is formed by the step of sputtering titanium onto the exposed substrate in a nitrogen ambient atmosphere.
Claim 18
Dependent Claim
20 words
The method of claim 14, wherein the titanium nitride barrier material is deposited to a thickness of approximately 1000 angstroms.
Claim 19
Independent Claim
172 words
A method for forming a self-aligned barrier layer for use in the manufacture of at least one electronic device on a semiconductor silicon substrate, comprising at least the steps of: a. forming an insulating oxide layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating oxide layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating oxide layer, thereby exposing part of the underlying silicon substrate; g. forming a barrier layer on the exposed substrate by sputtering titanium onto the exposed substrate in a nitrogen ambient atmosphere; h. removing the remainder of the metallic layer; and i. depositing an aluminum contact layer over the insulating oxide layer and in contact with the barrier layer; whereby the barrier layer prevents semiconductor junction spiking.
Claim 20
Independent Claim
172 words
A method for forming a self-aligned barrier layer for use in the manufacture of at least one electronic device on a semiconductor silicon substrate, comprising at least the steps of: a. forming an insulating oxide layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating oxide layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating oxide layer, thereby exposing part of the underlying silicon substrate; g. forming a barrier layer on the exposed substrate by sputtering titanium onto the exposed substrate in a nitrogen ambient atmosphere; h. removing the remainder of the metallic layer; and i. depositing an aluminum contact layer over the insulating oxide layer and in contact with the barrier layer; whereby the barrier layer prevents semiconductor junction spiking.
Claim 21
Independent Claim
207 words
A method for forming a self-aligned barrier layer and oxidation mask for use in the manufacture of at least one electronic device on a semiconductor silicon substrate, comprising at least the steps of: a. forming an insulating oxide layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating oxide layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating oxide layer, thereby exposing part of the underlying silicon substrate; g. forming a barrier layer and oxidation mask on the exposed substrate by sputtering titanium onto the exposed substrate in a nitrogen ambient atmosphere; h. removing the remainder of the metallic layer; i. flowing the exposed insulating oxide layer to prevent stress point sites; and j. depositing an aluminum contact layer over the insulating oxide layer and in contact with the barrier layer and oxidation mask; whereby the barrier layer and oxidation mask prevent semiconductor junction spiking and oxidation of the semiconductor junction during the flow process step.
Claim 22
Independent Claim
207 words
A method for forming a self-aligned barrier layer and oxidation mask for use in the manufacture of at least one electronic device on a semiconductor silicon substrate, comprising at least the steps of: a. forming an insulating oxide layer on the substrate; b. forming a metallic layer on the insulating layer; c. forming an etch-resistant layer on the metallic layer; d. selectively removing part of the etch-resistant layer, thereby exposing part of the underlying metallic layer; e. removing the exposed part of the metallic layer, thereby exposing part of the underlying insulating oxide layer; f. removing the remainder of the etch-resistant layer, and the exposed part of the insulating oxide layer, thereby exposing part of the underlying silicon substrate; g. forming a barrier layer and oxidation mask on the exposed substrate by sputtering titanium onto the exposed substrate in a nitrogen ambient atmosphere; h. removing the remainder of the metallic layer; i. flowing the exposed insulating oxide layer to prevent stress point sites; and j. depositing an aluminum contact layer over the insulating oxide layer and in contact with the barrier layer and oxidation mask; whereby the barrier layer and oxidation mask prevent semiconductor junction spiking and oxidation of the semiconductor junction during the flow process step.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-05-17 | 1991-11-16 | 1992-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-05-17 | 1995-11-16 | 1996-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-05-17 | 1999-11-16 | 2000-05-17 | $7700.00 | Window Closed / Lapsed |