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US4740713A Expired / Lapsed US ⏱️ 0.0 years remaining

MOS semiconductor integrated circuit in which the production of hot carriers near the drain of a short n channel conductivity type MOS transistor is decreased

Assignee: Toshiba Corp
•
Filing: 1985-12-30
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Granted: 1988-04-26
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Expires: 2005-12-30
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Abstract

Abstract Semiconductor integrated circuit of the present invention comprises a signal output terminal, a load circuit connected to the signal output terminal, a transistor circuit which is constituted by at least one first channel MOS transistor and has an output terminal connected to the signal output terminal and an input terminal connected to a signal input terminal, and a first channel enhancement type MOS transistor that is inserted between the transistor circuit's output terminal and the signal output terminal and is made normally in an on state. It is an object of the present invention to provide a highly reliable semiconductor integrated circuit in which no deterioration of characteristics due to hot carriers occurs even when the circuit is constituted using short channel MOS transistors with an effective channel length of about 1 micron or less.

Inventors

  • 👤 Takayasu Sakurai
  • 👤 Tetsuya Iizuka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 22:55
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/10; G11C7/1051; G11C7/1057; G11C5/00; G11C5/14; G11C7/1078; G11C7/1084; G11C7/22; G11C8/00; G11C8/08; H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0013; H03K19/003; H03K19/00315; H03K19/00346; H03K19/00361; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/0948

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 158 words
Semiconductor integrated circuit having a signal input terminal, a signal output terminal, and a power supply terminal to which is supplied a power supply voltage, comprising: a load circuit connected to the signal output terminal, wherein the load circuit comprises at least one p channel conductivity type MOS transistor; a transistor circuit comprising at least one short n channel conductivity type MOS transistor and having an output terminal connected to the signal output terminal and an input terminal connected to the signal input terminal; and n channel conductivity enhancement type MOS transistor means for decreasing the production of hot carriers in the vicinity of the drain of the short n channel conductivity type MOS transistor, said MOS transistor means coupled between the output terminal of the transistor circuit and the signal output terminal and made normally in an on state; wherein the signal output terminal is set at a voltage which is higher than the power supply voltage.
Claim 2
Dependent Claim 158 words
Semiconductor integrated circuit having a signal input terminal, a signal output terminal, and a power supply terminal to which is supplied a power supply voltage, comprising: a load circuit connected to the signal output terminal, wherein the load circuit comprises at least one p channel conductivity type MOS transistor; a transistor circuit comprising at least one short n channel conductivity type MOS transistor and having an output terminal connected to the signal output terminal and an input terminal connected to the signal input terminal; and n channel conductivity enhancement type MOS transistor means for decreasing the production of hot carriers in the vicinity of the drain of the short n channel conductivity type MOS transistor, said MOS transistor means coupled between the output terminal of the transistor circuit and the signal output terminal and made normally in an on state; wherein the signal output terminal is set at a voltage which is higher than the power supply voltage.
Claim 3
Dependent Claim 28 words
Semiconductor integrated circuit as claimed in claim 1, wherein an effective channel length of the short n channel conductivity type MOS transistor is about 1 micron or less.
Claim 4
Dependent Claim 25 words
Semiconductor integrated circuit as claimed in claim 1, wherein an external input signal is directly inputted into the signal input terminal from an input pad.
Claim 5
Dependent Claim 25 words
Semiconductor integrated circuit as claimed in claim 1, wherein an external output signal is directly outputted from the signal output terminal to an output pad.
Claim 6
Dependent Claim 180 words
Semiconductor integrated circuit having a signal input terminal and a signal output terminal, comprising: a load circuit connected to the signal output terminal, wherein the load circuit comprises at least one p channel conductivity type MOS transistor; a transistor circuit comprising at least one short n channel conductivity type MOS transistor and having an output terminal connected to the signal output terminal and an input terminal connected to the signal input terminal; and n channel conductivity enhancement type MOS transistor means for decreasing the production of hot carriers in the vicinity of the drain of the short n channel conductivity type MOS transistor, said MOS transistor means coupled between the output terminal of the transistor circuit and the signal output terminal and made normally in an on state; wherein the semiconductor integrated circuit is driven by at least two power supply systems including a lower power supply system and a higher power supply system and the signal input terminal is coupled to the lower power supply system and the signal output terminal is coupled to the higher power supply system.
Claim 7
Dependent Claim 180 words
Semiconductor integrated circuit having a signal input terminal and a signal output terminal, comprising: a load circuit connected to the signal output terminal, wherein the load circuit comprises at least one p channel conductivity type MOS transistor; a transistor circuit comprising at least one short n channel conductivity type MOS transistor and having an output terminal connected to the signal output terminal and an input terminal connected to the signal input terminal; and n channel conductivity enhancement type MOS transistor means for decreasing the production of hot carriers in the vicinity of the drain of the short n channel conductivity type MOS transistor, said MOS transistor means coupled between the output terminal of the transistor circuit and the signal output terminal and made normally in an on state; wherein the semiconductor integrated circuit is driven by at least two power supply systems including a lower power supply system and a higher power supply system and the signal input terminal is coupled to the lower power supply system and the signal output terminal is coupled to the higher power supply system.

References Cited (Backward Citations)

US3818245A Cited
US4069430A Cited
US4317055A Cited
US4513303A Cited
US4490629A Cited
US4571509A Cited
US4508978A Cited
US4584491A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-04-26 1991-10-26 1992-04-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-04-26 1995-10-26 1996-04-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-04-26 1999-10-26 2000-04-26 $7700.00 Window Closed / Lapsed

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