US4734751A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal scaling MESFET of a segmented dual gate design
Assignee: Lockheed Martin Corp
•
Filing: 1985-05-20
•
Granted: 1988-03-29
•
Expires: 2005-05-20
Abstract
Abstract A novel signal scaling MESFET of a segmented dual gate design is disclosed. The MESFET, which is monolithically integrated on a semi-insulating substrate capable of localized surface modification to form active semiconductor regions using MMIC (monolithic microwave integrated circuit) techniques, has a small AC signal transfer which is adjustable in selected discrete steps. For operation in the gigahertz range, the substrate is preferably of gallium arsenide. In applying the MMIC technique, the MESFET, including segment electrodes and segment interconnections, and the electrical connections, signal paths, and passive components connected to the MESFET are formed on the substrate and defined by a photolithographic process. The technique permits reproducable feature definition and very compact minimum reactance segment interconnections, reducing deleterious parasitics and facilitating virtual unitary MESFET operation to very high frequencies. The signal scaling MESFET is an active MESFET subdivided into an n-fold plurality of selectively activated MESFET segments, each of a predetermined width, with dual gates for each segment. The AC input signal is applied to the first gates of all n segments and a DC control potential is selectively applied to the second activating gate of each of the n segments to turn current flow "ON" or "OFF" in selected segments. The MESFET transfer values so formed are each substantially constant in a small AC signal sense and successive values are stepped at intervals suitable for linear, trigonometric, logarithmic or arbitrary scaling functions.
Inventors
- 👤 Ying C. Hwang
- 👤 Young K. Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 09:44
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/05
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
428 words
A monolithically integrated active MESFET exhibiting an accurate small signal transfer, adjustable in selected discrete steps, comprising A. an input terminal for application of an input signal, B. an output terminal for derivation of an output signal and application of drain potentials, C. a source terminal for application of source potentials, D. an (m+n) fold plurality of terminals for application of transconductance control potentials, E. a dual gate MESFET, subdivided into a first n-fold quantity of selectively activated MESFET segments, each segment having a predetermined width to achieve a desired transconductance for relatively larger steps in signal transfer and including (1) an electroded source region connected to said source terminal, (2) an electroded drain region connected to said output terminal, and (3) a gate region defined between said source and drain regions having (i) a signal gate electrode disposed between said source and an activating gate electrode electrically connected to said input terminal for modifying the output signal current of said MESFET as a function of the transconductance of the segment, and (ii) an activating gate electrode disposed between said signal gate and said drain for turning current flow "ON" and "OFF" in said MESFET segment, and electrically connected to one of said (m+n) fold plurality of transconductance control terminals, F. said dual gate MESFET being further subdivided into a second, m-fold quantity of selectively activated MESFET segments, each segment having a predetermined width to achieve a desired transconductance for relatively smaller steps in signal transfer, and including (1) an electroded source region connected to said source terminal, (2) an electroded drain region connected to said output terminal, and (3) a gate region defined beween said source and drain regions having (i) a signal gate electrode, disposed between said source and an activating gate electrode, for modifying the output signal current of said MESFET as a function of the transconductance of the segment, and (ii) an activating gate electrode disposed between said signal gate and said drain for turning current flow "ON" and "OFF" in said MESFET segment, and electrically connected to one of said (m+n) fold plurality transconductance control terminals, and G. voltage division means electrically connected between said input terminal and said m-fold signal gate electrodes to apply a reduced signal voltage thereto so that wider segments may be used while a proportionately smaller equivalent transconductance is provided, said (m+n) fold MESFET segment transconductances being weighted and ordered for converting to an electrical control signal coupled to said (m+n) fold control terminals such that successive combinations of active segments provide a desired series of transfer values.
Claim 2
Dependent Claim
428 words
A monolithically integrated active MESFET exhibiting an accurate small signal transfer, adjustable in selected discrete steps, comprising A. an input terminal for application of an input signal, B. an output terminal for derivation of an output signal and application of drain potentials, C. a source terminal for application of source potentials, D. an (m+n) fold plurality of terminals for application of transconductance control potentials, E. a dual gate MESFET, subdivided into a first n-fold quantity of selectively activated MESFET segments, each segment having a predetermined width to achieve a desired transconductance for relatively larger steps in signal transfer and including (1) an electroded source region connected to said source terminal, (2) an electroded drain region connected to said output terminal, and (3) a gate region defined between said source and drain regions having (i) a signal gate electrode disposed between said source and an activating gate electrode electrically connected to said input terminal for modifying the output signal current of said MESFET as a function of the transconductance of the segment, and (ii) an activating gate electrode disposed between said signal gate and said drain for turning current flow "ON" and "OFF" in said MESFET segment, and electrically connected to one of said (m+n) fold plurality of transconductance control terminals, F. said dual gate MESFET being further subdivided into a second, m-fold quantity of selectively activated MESFET segments, each segment having a predetermined width to achieve a desired transconductance for relatively smaller steps in signal transfer, and including (1) an electroded source region connected to said source terminal, (2) an electroded drain region connected to said output terminal, and (3) a gate region defined beween said source and drain regions having (i) a signal gate electrode, disposed between said source and an activating gate electrode, for modifying the output signal current of said MESFET as a function of the transconductance of the segment, and (ii) an activating gate electrode disposed between said signal gate and said drain for turning current flow "ON" and "OFF" in said MESFET segment, and electrically connected to one of said (m+n) fold plurality transconductance control terminals, and G. voltage division means electrically connected between said input terminal and said m-fold signal gate electrodes to apply a reduced signal voltage thereto so that wider segments may be used while a proportionately smaller equivalent transconductance is provided, said (m+n) fold MESFET segment transconductances being weighted and ordered for converting to an electrical control signal coupled to said (m+n) fold control terminals such that successive combinations of active segments provide a desired series of transfer values.
Claim 3
Dependent Claim
27 words
The monolithically integrated MESFET set forth in claim 1 wherein said voltage division means is a pair of resistances formed on said substrate by a photolithographic process.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-03-29 | 1991-09-28 | 1992-03-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-03-29 | 1995-09-28 | 1996-03-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-03-29 | 1999-09-28 | 2000-03-29 | $7700.00 | Window Closed / Lapsed |