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US4439744A Expired / Lapsed US ⏱️ 0.0 years remaining

Variable power amplifier

Assignee: Lockheed Martin Corp
•
Filing: 1981-12-24
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Granted: 1984-03-27
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Expires: 2001-12-24
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Abstract

Abstract A plurality of FET or other amplifiers are connected between respective outputs of an N output port power divider network and respective inputs of an N input power combining network in a variable power amplifier system. A gate bias is selectively supplied to each of the amplifiers which is either at a first value to cause the amplifier to amplify or at a second value to cause the amplifier to be cut off and therefore to not dissipate any DC power. The number of amplifiers receiving the first potential is determinative of the amount of power amplification of the variable power amplifier.

Inventors

  • 👤 Mahesh Kumar
  • 👤 Lakshminarasimha C. Upadhyayula

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 11:11
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/20; H03F3/21; H03F3/211; H03F1/00; H03F1/02; H03F1/0205; H03F1/0277; H03F3/60; H03F3/602; H03F3/604; H03F3/72

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 202 words
A variable power amplifier system comprising, in combination: an in-phase power divider network having an input port for receiving thereat an alternating signal to be amplified in power and having N output ports; an in-phase power combining network having N input ports and one output port; N signal amplifier means coupled to respective ones of said N output ports to receive said alternating signal therefrom to be amplified and coupled to respective ones of said N input ports to provide amplified signals thereto; each of said amplifiers comprising an active device having a terminal coupled to receive said alternating signal and also adapted to receive a bias potential thereat; and logic means coupled to each said terminal for selectively supplying either a first or a second bias potential thereto, said first potential being of such value as to cause said device to amplify, said second potential being of such value as to cause said device to be cut off to thereby provide no output signal and consume no power; whereby the power supplied to said output port of said power combining network is a function of which amplifiers are at said first bias potential and which are at said second bias potential.
Claim 2
Dependent Claim 202 words
A variable power amplifier system comprising, in combination: an in-phase power divider network having an input port for receiving thereat an alternating signal to be amplified in power and having N output ports; an in-phase power combining network having N input ports and one output port; N signal amplifier means coupled to respective ones of said N output ports to receive said alternating signal therefrom to be amplified and coupled to respective ones of said N input ports to provide amplified signals thereto; each of said amplifiers comprising an active device having a terminal coupled to receive said alternating signal and also adapted to receive a bias potential thereat; and logic means coupled to each said terminal for selectively supplying either a first or a second bias potential thereto, said first potential being of such value as to cause said device to amplify, said second potential being of such value as to cause said device to be cut off to thereby provide no output signal and consume no power; whereby the power supplied to said output port of said power combining network is a function of which amplifiers are at said first bias potential and which are at said second bias potential.
Claim 3
Dependent Claim 29 words
The combination as set forth in claim 1 wherein said power divider network is adapted to produce unequal values of power at respective ones of its N output ports.
Claim 4
Dependent Claim 66 words
The combination as set forth in either claim 1 or claim 2 wherein said amplifier means for at least one port comprises a plurality of series-connected amplifiers, each such amplifier comprising an FET having a gate terminal and wherein said logic means supplies to all said gate terminals for all the amplifiers of said one port amplifier means either said first potential or said second potential.
Claim 5
Dependent Claim 32 words
The combination as set forth in claim 1 or claim 2 wherein the electrical length from the input port of said power divider network to the N output ports thereof are identical.
Claim 6
Dependent Claim 22 words
The combination as set forth in claim 4 wherein said power combining network is identical in configuration to said power divider network.

References Cited (Backward Citations)

DE2355512A1 Cited
JPS54107249A Cited
US4311965A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-03-27 1987-09-26 1988-03-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-03-27 1991-09-26 1992-03-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-03-27 1995-09-26 1996-03-27 $7700.00 Window Closed / Lapsed

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