← Back to Patent Explorer
US4730341A Expired / Lapsed US ⏱️ 0.0 years remaining

Equalizer and equalizing circuit using the same

Assignee: Mitsubishi Electric Corp
•
Filing: 1986-08-19
•
Granted: 1988-03-08
•
Expires: 2006-08-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An equalizing circuit comprises a hopping-type amplitude equalizer (70) for changing the characteristics of burst signals inputted sequentially thereto to desired characteristics. The output of the equalizer (70) is distributed by a distributor (23) to a desired number of paths. Each output path of the distributor (23) is provided with a hopping switch (25a, 25b, or 25c), which is operated in synchronism with the amplitude equalizer (70). Consequently, even if the number of signal paths is increased, the number of equalizers required is smaller than the number of signal paths.

Inventors

  • 👤 Kazuo Saito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 22:44
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/04; H04B3/14

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 126 words
An equalizing circuit (20) interposed in a signal transmission line for changing the characteristics of a transmitted signal to desired characteristics, comprising: equalizing means (70, 90) for changing a plurality of serially input burst signals by providing thereto plural predetermined characteristics in a time division manner, signal distributing means (23) for distributing said signals changed by said equalizing means (70, 90) to a desired number of paths, and switching means (25a, 25b, 25c) coupled to respective output terminals of said signal distributing means (23) for turning on and off in synchronism with the operation of said equalizing means (70, 90), said equalizing means and said switching means responsive to a hopping control signal to provide to said burst signals different equalizing characteristics for different switched connections.
Claim 2
Dependent Claim 126 words
An equalizing circuit (20) interposed in a signal transmission line for changing the characteristics of a transmitted signal to desired characteristics, comprising: equalizing means (70, 90) for changing a plurality of serially input burst signals by providing thereto plural predetermined characteristics in a time division manner, signal distributing means (23) for distributing said signals changed by said equalizing means (70, 90) to a desired number of paths, and switching means (25a, 25b, 25c) coupled to respective output terminals of said signal distributing means (23) for turning on and off in synchronism with the operation of said equalizing means (70, 90), said equalizing means and said switching means responsive to a hopping control signal to provide to said burst signals different equalizing characteristics for different switched connections.
Claim 3
Dependent Claim 25 words
An equalizing circuit in accordance with claim 1, wherein, said signal transmission line is a signal transmission line in a time division multiplex access system.
Claim 4
Dependent Claim 53 words
An equalizing circuit in accordance with claim 1, wherein said equalizing means (70, 90) comprises coefficient applying means (78, 98) for applying a coefficient to an input signal thereby to change the characteristics of said input signal, and selection means (84, 88, 102, 103) for selecting said coefficient in a time dividing manner.
Claim 5
Dependent Claim 55 words
An equalizing circuit in accordance with claim 3, wherein said selecting means (84, 88, 102, 103) comprises coefficient setting means (81, 82, 83, 102) for setting a plurality of coefficients and means (84, 88, 103) for supplying selectively said coefficients set by said setting means (81, 82, 83, 102) to coefficient applying means (78, 98).
Claim 6
Dependent Claim 26 words
An equalizing circuit in accordance with claim 4, wherein said coefficient setting means comprises a plurality of level adjusters (81, 82, 83) for setting different coefficients.
Claim 7
Dependent Claim 23 words
An equalizing circuit in accordance with claim 4, wherein said coefficient setting means comprises storage means (102) for storing a plurality of coefficients.
Claim 8
Dependent Claim 18 words
An equalizing circuit in accordance with claim 6, wherein said storage means comprises a random access memory (102).
Claim 9
Dependent Claim 109 words
A single equalizer (70, 90) interposed in a signal transmission line of a TDMA system for compensating characteristics of a plurality of burst signals transmitted on a single line, comprising: coefficient applying means (78, 98) for applying a coefficient to provide a predetermined equalization for said transmitted signal, coefficient setting means (81, 82, 83, 102) for setting a plurality of coefficients of said equalizer to different predetermined values for different time periods of said TDMA system, and coefficient selecting means (84, 83, 103) for selectively providing to said coefficient applying means the coefficients set by said coefficient setting means in accordance with a hopping signal of the TDMA system.
Claim 10
Dependent Claim 109 words
A single equalizer (70, 90) interposed in a signal transmission line of a TDMA system for compensating characteristics of a plurality of burst signals transmitted on a single line, comprising: coefficient applying means (78, 98) for applying a coefficient to provide a predetermined equalization for said transmitted signal, coefficient setting means (81, 82, 83, 102) for setting a plurality of coefficients of said equalizer to different predetermined values for different time periods of said TDMA system, and coefficient selecting means (84, 83, 103) for selectively providing to said coefficient applying means the coefficients set by said coefficient setting means in accordance with a hopping signal of the TDMA system.
Claim 11
Dependent Claim 26 words
An equalizer in accordance with claim 8, wherein said coefficient setting means comprises a plurality of level adjusters (81, 82, 83) for setting different signal levels.
Claim 12
Dependent Claim 52 words
An equalizer in accordance with claim 9, wherein said coefficient selecting means comprises switching means (84, 88) connected between said respective level adjusters and said coefficient applying means for selecting any of said level adjusters thereby to apply the signal level of the selected level adjuster to said coefficient applying means (78).
Claim 13
Dependent Claim 33 words
An equalizer in accordance with claim 10, wherein said switching means (84) comprises selection switches (85, 86, 87), and hopping control means (88) for controlling cyclically the selection timing of said selection switches.
Claim 14
Dependent Claim 21 words
An equalizer in accordance with claim 8, wherein said coefficient setting means comprises storage means (102) for storing plurality of signals.
Claim 15
Dependent Claim 18 words
An equalizer in accordance with claim 12, wherein said storage means is capable of rewriting the stored content.
Claim 16
Dependent Claim 43 words
An equalizer in accordance with claim 12, wherein said coefficient selecting means comprises read control means for reading the signals stored in said storage means, and hopping control means for successively designating read addresses in said read control means with a prescribed cycle.
Claim 17
Dependent Claim 92 words
In a TDMA system, the improvement comprising: a hopping equalizer means receiving a sequence of signal bursts, said hopping equalizer means responsive to a hopping control signal for changing a characteristic thereof to equalize each of the signal bursts received thereby, and plural hopping switch means receiving an output of said hopping equalizer means, said plural hopping switch means responsive to said hopping control signal for passing a sequence of signal bursts equalized by different equalization characteristics of said hopping equalizer means in a time division manner on a plurality of outputs.
Claim 18
Dependent Claim 92 words
In a TDMA system, the improvement comprising: a hopping equalizer means receiving a sequence of signal bursts, said hopping equalizer means responsive to a hopping control signal for changing a characteristic thereof to equalize each of the signal bursts received thereby, and plural hopping switch means receiving an output of said hopping equalizer means, said plural hopping switch means responsive to said hopping control signal for passing a sequence of signal bursts equalized by different equalization characteristics of said hopping equalizer means in a time division manner on a plurality of outputs.
Claim 19
Dependent Claim 100 words
An improved TDMA system as recited in claim 15 wherein said hopping equalizer means includes a voltage controlled coefficient generating means, a plurality of voltage level adjusting means, and a selection switch means for selectively connecting one of said plurality of level adjusting means to said voltage controlled coefficient generating means, said selection switch means responsive to said hopping control signal for connecting different ones of said level adjusting means to said coefficient generating means, thereby providing to said hopping equalizer means different equalizing characteristics at different time periods of said TDMA system in response to said hopping control signal.
Claim 20
Dependent Claim 38 words
An improved TDMA system as recited in claim 16 wherein said hopping equalizer means is provided at an input of a distributor means providing an output of said hopping equalizer means to each of said hopping switch means.
Claim 21
Dependent Claim 91 words
An improved TDMA system as recited in claim 15 wherein said hopping equalizer means includes a voltage controlled coefficient generating means, storage means for storing plural voltage values in different addresses thereof, said storage means responsive to said hopping control signal for reading stored voltage values from said different addresses; and means for providing said voltage values from said storage means to said coefficient generating means, thereby providing to said hopping equalizer means different equalizing characteristics at different time periods of said TDMA system in response to said hopping control signal.
Claim 22
Dependent Claim 38 words
An improved TDMA system as recited in claim 18 wherein said hopping equalizer means is provided at an input of a distributor means providing an output of said hopping equalizer means to each of said hopping switch means.
Claim 23
Dependent Claim 26 words
An improved TDMA system as recited in claim 15 wherein said hopping equalizer means comprises an analog equalizing means for providing analog equalization of signal characteristics.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-03-08 1991-09-07 1992-03-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-03-08 1995-09-07 1996-03-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-03-08 1999-09-07 2000-03-08 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag