Automatic, digitally synthesized matching line terminating impedance

Claim 2

A circuit for automatically digitally synthesizing an output matching line terminating impedance comprising: analog to digital conversion means for converting negative feedback analog communication signals occurring at circuit output terminals to negative feedback digital signals; means for summing said negative feedback digital signals with input digital communication signals providing a composite digital signal input; digital filter means having said composite digital signal input coupled thereto for directly establishing a predetermined output impedance characteristic, said digital filter having filter coefficients, and having a digital signal output; means for selectively altering said filter coefficients; digital to analog conversion means for converting said digital signal output to an analog voltage signal; and means for converting said analog voltage signal to an analog current having a high output impedance characteristic compared to the matched line and to the synthesized impedance such that said analog current is coupled to said circuit output terminals and to said analog to digital conversion means.

Claim 3

A circuit in accordance with claim 1 wherein said means for converting said analog voltage signal to an analog current comprises: transconductance amplifier means having an output current defined by a specific current to voltage transfer ratio g mhos.

Claim 4

A circuit in accordance with claim 1 wherein said predetermined output impedance characteristic of said circuit is derived by varying said filter coefficients in accordance with a control data input from said means for altering said filter coefficients.

Claim 5

A circuit in accordance with claim 3, wherein said means for altering said filter coefficients includes an automatic equalizer means for directly deriving the recursive digital filter coefficients based on the minimization of error between the equalizer output and a reference.

Claim 6

A circuit in accordance with claim 3 wherein said digital filter is a recursive digital filter.

Claim 7

A circuit in accordance with claim 5 wherein said recursive digital filter includes five variable filter coefficients.

Claim 8

A circuit in accordance with claim 1 wherein said line includes incidental shunting impedances between said line and said circuit, and wherein the admittance of said line is represented by Y L , the admittance of said shunting impedance is represented by Yx and wherein said predetermined output impedance characteristic of said digital filter is equal to Y L -Yx.

Claim 9

A circuit in accordance with claim 7 wherein said incidental shunting impedances include telephone battery feed and leakage impedance effects.

Claim 10

A circuit in accordance with claim 3 further comprising: analog-to-digital prefilter means for limiting the input bandwidth of said analog communication signals to a predetermined frequency range; and analog-to-digital postfilter means for establishing a desired feedback gain characteristic.

Claim 11

A circuit in accordance with claim 3 further comprising: digital-to-analog prefilter means for establishing a desired digital-to-analog path gain characteristic; and digital-to-analog postfilter means for filtering the output of said digital-to-analog conversion means to reduce quantizing effects.

Claim 12

A circuit for digitally synthesizing a line matching impedance comprising: analog-to-digital conversion means for converting negative feedback input analog signals to negative feedback digital signals; means for summing said negative feedback digital signals with additional digital signals to derive a combined signal output; recursive digital filter means having said combined signal output coupled thereto, and having filter coefficients; means for programmably altering said filter coefficients such that the processing of said combined signal output by said digital filter establishes a controllable line matching impedance characteristic of said circuit with respect to said digital filter transfer characteristics; digital-to-analog conversion means for converting the output of said digital filter to an analog voltage signal; and transconductance amplifier means for converting said analog voltage signal to an analog current having a high output impedance characteristic with respect to the impedance at the output of said converting means, said analog current also being coupled to said analog-to-digital conversion means.

Claim 13

A circuit for digitally synthesizing a line matching impedance comprising: analog-to-digital conversion means for converting negative feedback input analog signals to negative feedback digital signals; means for summing said negative feedback digital signals with additional digital signals to derive a combined signal output; recursive digital filter means having said combined signal output coupled thereto, and having filter coefficients; means for programmably altering said filter coefficients such that the processing of said combined signal output by said digital filter establishes a controllable line matching impedance characteristic of said circuit with respect to said digital filter transfer characteristics; digital-to-analog conversion means for converting the output of said digital filter to an analog voltage signal; and transconductance amplifier means for converting said analog voltage signal to an analog current having a high output impedance characteristic with respect to the impedance at the output of said converting means, said analog current also being coupled to said analog-to-digital conversion means.

Claim 14

A circuit in accordance with claim 11 wherein said means for programmably altering said filter coefficients includes control logic means for deriving a coefficient control data signal from data stored in a memory, said data signal being coupled to said digital filter to vary said filter coefficients in accordance with said control signal, said control logic including means for generating a reference such that said digital filter coefficients are varied to minimize the error between the digital filter output and said reference.

Claim 15

A circuit in accordance with claim 12 wherein said control logic includes means for deriving a digital representation of a line impedance, and means for loading said digital representation into memory for storage.

Claim 16

A circuit in accordance with claim 13 further including means for initializing the digital filter coefficients with said stored digital representation, such that fast equalization is provided by holding the previous digital filter tap coefficients as the starting coefficients for a subsequent equalization operation.

Claim 17

A circuit in accordance with claim 11 wherein said circuit is configured on an LSI chip.