Patent US4729124A successfully refreshed from Google Patents.
US4729124A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Diagnostic system
Assignee: Concurrent Computer Corp
•
Filing: 1985-12-19
•
Granted: 1988-03-01
•
Expires: 2005-12-19
Abstract
Abstract The present invention is directed to a diagnostic system which utilizes a microprocessor within the power module to control the diagnostic function of all field replaceable modules powered thereby; additional diagnostic hardware being located on each replaceable module which may be utilized in normal operation for functions of the module and, on an interrupt basis, it is utilized in diagnostic functions; the diagnostic hardware in the power module serving to collect the diagnostic test data from all the functional modules powered thereby, the data being transmitted thereto over a diagnostic data bus. If a plurality of power supplies are present in the system, each power supply has a microprocessor for control, each such microprocessor being coupled to the replaceable modules and the diagnostic circuitry therein; a bus being provided between the processors in the power supplies so that one such microprocessor can become a master diagnostic to process all the diagnostic messages from the system.
Inventors
- 👤 Allen Hansel
- 👤 Kenneth Yeager
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:30
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/30; H; H04; H04L; H04L12/00; H04L12/02; H04L12/10; G06F11/22; H04L12/28; H04L12/40; H04L12/403; H04L43/00; H04L43/50; G06F11/2205
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
177 words
A diagnostic system for detecting and indicating errors in a computer system including a plurality of replaceable logic modules, the system comprising, in combination: a controller bus; a plurality of communication buses; a plurality of diagnostic system controllers each including a microprocessor, a read-only-memory, a random access memory, means to couple the microprocessor to said controller bus and means to couple said microprocessor to only one of said communication buses; means in each of said diagnostic system controllers for establishing one of said diagnostic system controllers as the master diagnostic system controller on said controller bus, said master diagnostic system controller being operative to control communication on said controller bus; a plurality of functional units associated with each of said communication buses and each said functional unit including diagnostic testing circuits including a microprocessor for testing the functional unit and including means to communicate on said each of said communication buses coupled thereto in response to polling signals therein; and each said diagnostic system controller including means to produce polling signals on the communication bus coupled thereto.
Claim 2
Dependent Claim
177 words
A diagnostic system for detecting and indicating errors in a computer system including a plurality of replaceable logic modules, the system comprising, in combination: a controller bus; a plurality of communication buses; a plurality of diagnostic system controllers each including a microprocessor, a read-only-memory, a random access memory, means to couple the microprocessor to said controller bus and means to couple said microprocessor to only one of said communication buses; means in each of said diagnostic system controllers for establishing one of said diagnostic system controllers as the master diagnostic system controller on said controller bus, said master diagnostic system controller being operative to control communication on said controller bus; a plurality of functional units associated with each of said communication buses and each said functional unit including diagnostic testing circuits including a microprocessor for testing the functional unit and including means to communicate on said each of said communication buses coupled thereto in response to polling signals therein; and each said diagnostic system controller including means to produce polling signals on the communication bus coupled thereto.
Claim 3
Dependent Claim
34 words
The system of claim 1 wherein each said diagnostic system controller is disposed in a power supply and the microprocessor therein is utilized to control the power supply in addition to performing diagnostic functions.
Claim 4
Dependent Claim
48 words
The system of claim 1 wherein each said diagnostic system controller includes means to respond to polling signals on said controller bus from said master diagnostic system controller, said polling signal including an identifying portion which uniquely identifies the one diagnostic system controller which is to respond thereto.
Claim 5
Dependent Claim
41 words
The system of claim 1 wherein each said diagnostic system controller includes means to attempt to establish itself as said master system diagnostic controller in the event that no communications occur over said controller bus for a prescribed period of time.
Claim 6
Dependent Claim
48 words
The system of claim 2 wherein each said diagnostic system controller includes means to respond to polling signals on said controller bus from said master diagnostic system controller, said polling signal including an identifying portion which uniquely identifies the one diagnostic system controller which is to respond thereto.
Claim 7
Dependent Claim
41 words
The system of claim 2 wherein each said diagnostic system controller includes means to attempt to establish itself as said master system diagnostic controller in the event that no communications occur over said controller bus for a prescribed period of time.
Claim 8
Dependent Claim
41 words
The system of claim 5 wherein each said diagnostic system controller includes means to attempt to establish itself as said master system diagnostic controller in the event that no communications occur over said controller bus for a prescribed period of time.
Claim 9
Dependent Claim
56 words
The system of claim 1 additionally including a system console coupled via a console bus to each said diagnostic system controlling said master diagnostic system controller including means to transmit messages onto said console bus to permit the console operator to control the diagnostic system and to receive data from said console bus indicating system status.
Claim 10
Dependent Claim
220 words
A diagnostic system for a multi-processor computer comprising, in combination: a controller bus; a plurality of diagnostic system controllers each coupled to said controller bus, each diagnostic system controller having a countdown timer settable to a unique value different from that of all other diagnostic system controllers and actuated at substantially the same time, the diagnostic system controller in which said countdown timer first goes to zero becomes the master diagnostic system controller; each diagnostic system controller being responsive to unique signals on said control bus from said master diagnostic system controller to place reply signals to said master diagnostic system controller on said controller bus; a communication bus coupled to each said diagnostic system controller; a plurality of processor units coupled to each said communication bus, each processor unit including diagnostic hardware actuated by a first unique signal on said communication bus to perform diagnostic tests on the hardware in said processor unit and to place the diagnostic test results to said communicator bus in response to the receipt of a second unique signal; each diagnostic system controller including means to produce said first and said second unique signals on said controller bus; and said master diagnostic system controller being operative to actuate said means to produce said first and said second unique signals on each said controller bus.
Claim 11
Dependent Claim
220 words
A diagnostic system for a multi-processor computer comprising, in combination: a controller bus; a plurality of diagnostic system controllers each coupled to said controller bus, each diagnostic system controller having a countdown timer settable to a unique value different from that of all other diagnostic system controllers and actuated at substantially the same time, the diagnostic system controller in which said countdown timer first goes to zero becomes the master diagnostic system controller; each diagnostic system controller being responsive to unique signals on said control bus from said master diagnostic system controller to place reply signals to said master diagnostic system controller on said controller bus; a communication bus coupled to each said diagnostic system controller; a plurality of processor units coupled to each said communication bus, each processor unit including diagnostic hardware actuated by a first unique signal on said communication bus to perform diagnostic tests on the hardware in said processor unit and to place the diagnostic test results to said communicator bus in response to the receipt of a second unique signal; each diagnostic system controller including means to produce said first and said second unique signals on said controller bus; and said master diagnostic system controller being operative to actuate said means to produce said first and said second unique signals on each said controller bus.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-03-01 | 1991-08-31 | 1992-03-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-03-01 | 1995-08-31 | 1996-03-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-03-01 | 1999-08-31 | 2000-03-01 | $7700.00 | Window Closed / Lapsed |