IC input circuitry programmable for realizing multiple functions from a single input

Claim 2

A programmable input circuit for an integrated circuit chip, comprising: (a) a plurality of digital logic circuits, each having: (1) an output connected to a function circuit on said chip to provide a binary signal outptut; (2) a first input terminal coupled to a circuit input terminal; and (3) a second input terminal; (b) a plurality of decoder means, each having an output connected to said second input terminal of said digital logic circuits; and each having input means; and (c) programmable means connected to each of said input means on each of said decoder means for providing an input signal to said decoder means, which signal is indicative of said digital logic means to be selected.

Claim 3

The circuit as set forth in claim 1, wherein said programmable means comprises: fuses, the conductive or nonconductive condition of which program said decoder means.

Claim 4

The circuit as set forth in claim 2, wherein said input circuit further comprises: n fuses; and N input circuit means, where N=2 n .

Claim 5

The circuit as set forth in claim 1, wherein said programmable means comprises: pass-gate circuitry, the ON-OFF condition of said pass-gates determining said programming of said decoder means.

Claim 6

A programmable input pin scheme for a circuit, comprising: a plurality, N, of circuit means, each having a first input discretely coupled to said input pin and each having an output coupled to an input terminal of said circuit, for selectively providing a signal to said input of said circuit; and N decoder circuit means having n programmable input means, where N=2 n , each of said programmable input means having an input coupled to a reference potential, and N outputs discretely coupled to second inputs of said circuit means, such that whether the reference potential signal level condition of said input means is high or low, depending upon the conductive state of said programmble input means, is decoded by said decoder means, enabling only one of said circuit means.

Claim 7

A programmable input pin scheme for a circuit, comprising: a plurality, N, of circuit means, each having a first input discretely coupled to said input pin and each having an output coupled to an input terminal of said circuit, for selectively providing a signal to said input of said circuit; and N decoder circuit means having n programmable input means, where N=2 n , each of said programmable input means having an input coupled to a reference potential, and N outputs discretely coupled to second inputs of said circuit means, such that whether the reference potential signal level condition of said input means is high or low, depending upon the conductive state of said programmble input means, is decoded by said decoder means, enabling only one of said circuit means.

Claim 8

The input pin scheme as set forth in claim 5, wherein said n programmable input means comprise fused couplings between said reference potential and said decoder means.

Claim 9

The input scheme as set forth in claim 5, wherein said n programmable input means comprise pass- gate circuits for selectively coupling said reference potential to a selected one of said decoder means.

Claim 10

The input pin scheme as set forth in claim 5, wherein said decoder means comprises: logic gate circuitry for decoding the reference potential signal level condition of said input means.

Claim 11

Circuitry for programming an input pin of an integrated circuit chip for multifunctional operational modes, comprising: a plurality, N, of discrete digital logic circuits, each having a first input discretely coupled to said input pin and each having an output coupled to an input terminal of said integrated circuit, for providing a digital logic signal to said input terminal of said integrated circuit; and N decoder circuits having n programmable input means, coupling said decoder circuits to a reference potential, and having N outputs discretely coupled to second inputs of said digital logic circuits, such that the condition of said input means is decoded by said decoder circuits, enabling only one of said digital logic circuits, and wherein N=2 n .

Claim 12

Circuitry for programming an input pin of an integrated circuit chip for multifunctional operational modes, comprising: a plurality, N, of discrete digital logic circuits, each having a first input discretely coupled to said input pin and each having an output coupled to an input terminal of said integrated circuit, for providing a digital logic signal to said input terminal of said integrated circuit; and N decoder circuits having n programmable input means, coupling said decoder circuits to a reference potential, and having N outputs discretely coupled to second inputs of said digital logic circuits, such that the condition of said input means is decoded by said decoder circuits, enabling only one of said digital logic circuits, and wherein N=2 n .

Claim 13

The circuitry as set forth in claim 9, wherein said programmable input means comprise fuses.

Claim 14

The circuitry as set forth in claim 9, wherein said programmable input means comprise programmable passgate circuitry.

Claim 15

For use in an integrated circuit chip, a method for providing multifunctionality to an input pin to select one of a plurality of digital system input signals to be input into said system, comprising: providing a plurality of selectable discrete digital logic signals acting as said digital system input signals, each of said signals requiring at least two input signals before transmitting said digital system input signal to said system; providing a first digital enabling signal as one of said input signals from said input pin; and providing a second digital signal as the second of said input signals from an on-chip circuit which is preprogrammable as to which of said second inputs receives said second digital signal, whereby said input pin is programmable to select only one of said plurality of said digital signals by programming said on-chip circuit.

Claim 16

For use in an integrated circuit chip, a method for providing multifunctionality to an input pin to select one of a plurality of digital system input signals to be input into said system, comprising: providing a plurality of selectable discrete digital logic signals acting as said digital system input signals, each of said signals requiring at least two input signals before transmitting said digital system input signal to said system; providing a first digital enabling signal as one of said input signals from said input pin; and providing a second digital signal as the second of said input signals from an on-chip circuit which is preprogrammable as to which of said second inputs receives said second digital signal, whereby said input pin is programmable to select only one of said plurality of said digital signals by programming said on-chip circuit.

Claim 17

In an integrated circuit chip, circuitry for programming an input pin to multifunctional operation modes, comprising: a plurality, N, of discrete digital logic circuits, each having a first input discretely coupled to said input pin and each having an output coupled to an input terminal of said integrated circuit, for providing a digital logic signal to said input terminal of said integrated circuit; and a plurality, N, of decoder circuits having n programmable input means coupling said decoder circuits to a reference potential, and having N outputs discretely coupled to second inputs of said digital logic circuits, such that the condition of said input means is decoded by said decoder circuits, enabling only one of said digital logic circuits, and wherein N=2 n .

Claim 18

In an integrated circuit chip, circuitry for programming an input pin to multifunctional operation modes, comprising: a plurality, N, of discrete digital logic circuits, each having a first input discretely coupled to said input pin and each having an output coupled to an input terminal of said integrated circuit, for providing a digital logic signal to said input terminal of said integrated circuit; and a plurality, N, of decoder circuits having n programmable input means coupling said decoder circuits to a reference potential, and having N outputs discretely coupled to second inputs of said digital logic circuits, such that the condition of said input means is decoded by said decoder circuits, enabling only one of said digital logic circuits, and wherein N=2 n .

Claim 19

The circuitry as set forth in claim 13, wherein said programmable input means comprise fuses.

Claim 20

The circuitry as set forth in claim 13, wherein said programmable input means comprise programmable passgate circuitry.