US4718064A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic test system
Assignee: Western Digital Corp
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Filing: 1986-02-28
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Granted: 1988-01-05
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Expires: 2006-02-28
Abstract
Abstract An automatic test system for both production and trouble shooting evaluation of various computer peripheral controller devices. The automatic test system includes a central processing unit, a receiver card adapted to receive a particular type of peripheral controller-under-test and a peripheral emulator. The automatic test system may be employed in the testing of a wide range of peripheral controller devices by utilizing differing receiver cards adapted to each specific kind of peripheral under test. In operation command and data signals are sent from the processor to the controller-under-test through the receiver card, causing the controller-under-test to send modified command and data signals to the peripheral emulator. The central processor then accesses memory in the peripheral emulator to ascertain if the controller-under-test sent the proper commands and data. Testing is further carried out by the central processor loading both normal and abnormal data and status signals into the peripheral emulator and subsequently instructing the unit-under-test to extract the data from the emulator and submit it to the central processor.
Inventors
- 👤 David J. Edwards
- 👤 John M. Tillson
- 👤 James K. Benning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 18:11
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/261; G06F11/2205; G06F11/2221
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
141 words
An automatic test system for testing controllers for computer peripherals, comprising: processing means for generating data and control signals directing a controller-under-test to initiate a plurality of predetermined actions; receiver means, removably attached to the test system, for communicating the data and control signals from the processor means to the controller-under-test, said receiver means being configured for use with a specific type of peripheral controller; and emulator means, connected to the processor means and detachably coupled to the controller-under-test, for emulating a peripheral device to be controlled by the controller, said emulator means for receiving data, status, and control signals from the processor means and the controller-under-test, wherein the emulator means receives data and commands from the controller-under-test and makes data and status signals available to the controller under direction of the processor means to test the performance of the controller-under-test.
Claim 2
Dependent Claim
141 words
An automatic test system for testing controllers for computer peripherals, comprising: processing means for generating data and control signals directing a controller-under-test to initiate a plurality of predetermined actions; receiver means, removably attached to the test system, for communicating the data and control signals from the processor means to the controller-under-test, said receiver means being configured for use with a specific type of peripheral controller; and emulator means, connected to the processor means and detachably coupled to the controller-under-test, for emulating a peripheral device to be controlled by the controller, said emulator means for receiving data, status, and control signals from the processor means and the controller-under-test, wherein the emulator means receives data and commands from the controller-under-test and makes data and status signals available to the controller under direction of the processor means to test the performance of the controller-under-test.
Claim 3
Dependent Claim
29 words
The automatic test system of claim 1 wherein the receiver means includes an electronic latch to prevent signals from the controller-under-test from halting the operation of the processor means.
Claim 4
Dependent Claim
42 words
The automatic test system of claim 1 wherein the receiver means further includes memory means for storing data from the processor means, wherein the processor means is able to simulate the timing of data signals from a different type of processor means.
Claim 5
Dependent Claim
26 words
The automatic test system of claim 1 wherein the emulator means further includes means for measuring the timing relationship between data pulses received from the controller-under-test.
Claim 6
Dependent Claim
31 words
The automatic test system of claim 1 wherein the emulator means further includes means for altering the timing between data pulses received from the processor means and sent to the controller-under-test.
Claim 7
Dependent Claim
188 words
A modular automatic test system for the testing of controllers for computer peripheral devices comprising: procesing means for generating control signals corresponding to tests to be performed or a controller-under-test and receiving signals corresponding to the results of tests; a plurality of interchangeable receiver means for interfacing said processing means to various controllers to be tested, each receiver means being alternately connectable to the processing means and including a receptacle for receiving a controller; communications means for electrically coupling the controller to the processing means to enable communication therebetween; and emulator means, connectable to the processing means and to a controller-under-test, for emulating a peripheral device to be controlled by the controller, said emulator means for receiving commands and data from the controller-under-test as instructed by the processing means and providing information to the processing means indicative of whether said commands and data were properly generated by the controller, said emulator means also for providing signals to the controller-under-test to indicate various operations of the controller wherein signals from the controller and emulator means are analyzed by the processing means to determine if the controller is operating properly.
Claim 8
Dependent Claim
188 words
A modular automatic test system for the testing of controllers for computer peripheral devices comprising: procesing means for generating control signals corresponding to tests to be performed or a controller-under-test and receiving signals corresponding to the results of tests; a plurality of interchangeable receiver means for interfacing said processing means to various controllers to be tested, each receiver means being alternately connectable to the processing means and including a receptacle for receiving a controller; communications means for electrically coupling the controller to the processing means to enable communication therebetween; and emulator means, connectable to the processing means and to a controller-under-test, for emulating a peripheral device to be controlled by the controller, said emulator means for receiving commands and data from the controller-under-test as instructed by the processing means and providing information to the processing means indicative of whether said commands and data were properly generated by the controller, said emulator means also for providing signals to the controller-under-test to indicate various operations of the controller wherein signals from the controller and emulator means are analyzed by the processing means to determine if the controller is operating properly.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-01-04 | 1991-07-06 | 1992-01-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-01-04 | 1995-07-06 | 1996-01-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-01-04 | 1999-07-06 | 2000-01-05 | $7700.00 | Window Closed / Lapsed |