Patent US4710398A successfully refreshed from Google Patents.
US4710398A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and manufacturing method thereof
Assignee: Hitachi Ltd
•
Filing: 1986-08-26
•
Granted: 1987-12-01
•
Expires: 2006-08-26
Abstract
Abstract A method of manufacturing a semiconductor device. An insulation film having an opening is formed on a semiconductor substrate. The opening is filled with an electrically conductive material so as to substantially flatten the top surface of the opening filled with an electrically conductive material, an intermediate layer of an electrically conductive material having a greater allowable current density than that of a wiring layer to be formed thereon is formed so as to cover at least their surface of the electrically condictive material deposited in the opening. Subsequently, the wiring layer is formed so as to extend from the surface of the intermediate layer onto the surface of the insulation film. A semiconductor device incorporating the wiring layer having an extremely high reliability can be easily realized.
Inventors
- 👤 Yoshio Homma
- 👤 Takashi Nishida
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:44
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/40; H10W20/41; H10W20/425
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
106 words
A method of manufacturing a semiconductor device, comprising steps of: forming an insulation film having an opening on a semiconductor substrate; filling said opening with an electrically conductive material so as to substantially flatten the top end face of the filled opening; forming an intermediate layer of an electrically conductive material having a greater allowable current density than that of a wiring layer, said intermediate layer having a greater area than that of said opening so as to cover at least the surface of said electrically conductive material filling said opening; and forming said wiring layer which extends from said intermediate layer onto said insulation film.
Claim 2
Independent Claim
106 words
A method of manufacturing a semiconductor device, comprising steps of: forming an insulation film having an opening on a semiconductor substrate; filling said opening with an electrically conductive material so as to substantially flatten the top end face of the filled opening; forming an intermediate layer of an electrically conductive material having a greater allowable current density than that of a wiring layer, said intermediate layer having a greater area than that of said opening so as to cover at least the surface of said electrically conductive material filling said opening; and forming said wiring layer which extends from said intermediate layer onto said insulation film.
Claim 3
Dependent Claim
38 words
A method of manufacturing a semiconductor device according to claim 1, wherein said electrically conductive material is selected from a group consisting of W, Ti, Zr, Ta and Mo, nitrides of these metals and alloys of these metals.
Claim 4
Dependent Claim
32 words
A method of manufacturing a semiconductor device according to claim 1, wherein the filling of said opening with said electrically conductive material is effectuated through CVD, sputtering, bias sputtering or vacuum evaporation.
Claim 5
Dependent Claim
49 words
A method of manufacturing a semiconductor device according to claim 1, wherein said intermediate layer is formed of a material selected from a group consisting of W, Mo, Ti, Zr, Ta, Co and Cr, nitrides of these metals, alloys of these metals, Al-Ti alloy, Al-W alloy, Au and Pt.
Claim 6
Dependent Claim
37 words
A method of manufacturing a semiconductor device according to claim 1, wherein said intermediate layer has a film thickness not smaller than 500 Å but less than about 20% of the film thickness of said wiring layer.
Claim 7
Independent Claim
193 words
A method of manufacturing a semiconductor device, comprising steps of: forming a first wiring layer on a semiconductor substrate; forming a first intermediate layer so as to cover at least a part of said first wiring layer, said first intermediate layer being formed of an electrically conductive material having a greater allowable current density than that of said first wiring layer; forming an insulation film having an opening on the surface of said first intermediate layer in such a manner in which a part of said first intermediate layer is exposed through said opening; filling said opening with an electrically conductive material so as to substantially flatten the top face of the filled opening; forming a second intermediate layer so as to cover at least the surface of said electrically conductive material filling said opening, said second intermediate layer being formed of a material having a greater allowable current density than that of a second wiring layer to be formed thereon and having a greater area than that of said opening; and forming said second wiring layer extending from the surface of said second intermediate layer onto the surface of said insulation film.
Claim 8
Independent Claim
193 words
A method of manufacturing a semiconductor device, comprising steps of: forming a first wiring layer on a semiconductor substrate; forming a first intermediate layer so as to cover at least a part of said first wiring layer, said first intermediate layer being formed of an electrically conductive material having a greater allowable current density than that of said first wiring layer; forming an insulation film having an opening on the surface of said first intermediate layer in such a manner in which a part of said first intermediate layer is exposed through said opening; filling said opening with an electrically conductive material so as to substantially flatten the top face of the filled opening; forming a second intermediate layer so as to cover at least the surface of said electrically conductive material filling said opening, said second intermediate layer being formed of a material having a greater allowable current density than that of a second wiring layer to be formed thereon and having a greater area than that of said opening; and forming said second wiring layer extending from the surface of said second intermediate layer onto the surface of said insulation film.
Claim 9
Dependent Claim
38 words
A method of manufacturing a semiconductor device according to claim 6, wherein said electrically conductive material is selected from a group consisting of W, Ti, Zr, Ta and Mo, nitrides of these metals and alloys of these metals.
Claim 10
Dependent Claim
32 words
A method of manufacturing a semiconductor device according to claim 6, wherein the filling of said opening with said electrically conductive material is effectuated through CVD, sputtering, bias sputtering or vacuum evaporation.
Claim 11
Dependent Claim
49 words
A mehtod of manufacturing a semiconductor device according to claim 6, wherein said intermediate layer is formed of a material selected from a group consisting of W, Mo, Ti, Zr, Ta, Co and Cr, nitrides of these metals, alloys of these metals, Al-Ti alloy, Al-W alloy, Au and Pt.
Claim 12
Dependent Claim
37 words
A method of manufacturing a semiconductor device according to claim 6, wherein said intermediate layer has a film thickness not smaller than 500 Å but less than about 20% of the film thickness of said wiring layer.
References Cited (Backward Citations)
US4378383A
Cited
US4415606A
Cited
US4532702A
Cited
US4582563A
Cited
US4592802A
Cited
US4566026A
Cited
US4624864A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-11-30 | 1991-06-01 | 1991-12-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-11-30 | 1995-06-01 | 1995-12-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-11-30 | 1999-06-01 | 1999-12-01 | $7700.00 | Window Closed / Lapsed |