Protection of inductive load switching transistors from inductive surge created overvoltage conditions

Claim 1

Integrated circuit arrangement including an inductive load switching transistor with overvoltage protection, said arrangement comprising: a semiconductor substrate of a first conductivity type, an epitaxial layer of a second conductivity type, including first and second major surfaces, overlying the substrate such that the first major surface is in intimate contact with said substrate, said inductive load switching transistor being formed in the substrate and epitaxial layer and comprising a buried collector region of the second conductivity type formed in said substrate and said epitaxial layer in the region of said epitaxial layer first major surface, a collector contact region extending from the second major surface of the epitaxial layer downward to contact the buried collector, a base region of the first conductivity type formed between the buried collector region and the second major surface of the epitaxial layer, contact means contacting the base region, an emitter region of the second conductivity type formed in the second major surface of the epitaxial layer and surrounded by said base region, contact means contacting the emitter region, the invention characterized by an additional region of the first conductivity type extending from a portion of the base region to, and into contact with, the buried collector region to form, with the buried collector, a pn junction Zener diode for forward biasing during overvoltage conditions and activating the inductive load switching transistor and allowing a portion of any overvoltage-created current to flow through said inductive load switching transistor.