Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
195 words
A method of manufacturing a semiconductor device, wherein a silicon wafer having a first impurity-doped layer and a second impurity doped layer with a higher impurity concentration than said first impurity-doped layer is formed, comprising the steps of: providing a first silicon substrate having a first impurity-doped layer and a third impurity-doped layer which has a higher impurity concentration than that of said first impurity-doped layer, said third impurity-doped layer having a mirror-polished surface; providing a second silicon substrate having a higher impurity concentration than that of said first impurity-doped layer and the same conductivity type as said third impurity-doped layer, said second silicon substrate having a mirror-polished surface; bringing the mirror polished surfaces of said third impurity-doped layer and said second silicon substrate into contact in a clean atmosphere so that virtually no foreign substances are present therebetween; and annealing said first and second silicon substrates with the mirror-polished surfaces in contact with each other at a temperature of at least 200° C. so as to bond said substrates together without fusion, thereby forming a silicon wafer with said third impurity-doped layer and said second substrate bonded together and forming a second impurity-doped layer.
Claim 2
Independent Claim
195 words
A method of manufacturing a semiconductor device, wherein a silicon wafer having a first impurity-doped layer and a second impurity doped layer with a higher impurity concentration than said first impurity-doped layer is formed, comprising the steps of: providing a first silicon substrate having a first impurity-doped layer and a third impurity-doped layer which has a higher impurity concentration than that of said first impurity-doped layer, said third impurity-doped layer having a mirror-polished surface; providing a second silicon substrate having a higher impurity concentration than that of said first impurity-doped layer and the same conductivity type as said third impurity-doped layer, said second silicon substrate having a mirror-polished surface; bringing the mirror polished surfaces of said third impurity-doped layer and said second silicon substrate into contact in a clean atmosphere so that virtually no foreign substances are present therebetween; and annealing said first and second silicon substrates with the mirror-polished surfaces in contact with each other at a temperature of at least 200° C. so as to bond said substrates together without fusion, thereby forming a silicon wafer with said third impurity-doped layer and said second substrate bonded together and forming a second impurity-doped layer.
Claim 3
Dependent Claim
32 words
A method according to claim 1, wherein said first and second impurity-doped layers are of the same conductivity type, and said first semiconductor substrate consists of said first and third impurity-doped layers.
Claim 4
Dependent Claim
69 words
A method according to claim 1, wherein said first and second impurity-doped layers are of different conductivity types; and said first semiconductor substrate consists of said first impurity-doped layer, a fourth impurity-doped layer formed thereon which has a higher impurity concentration than that of said first impurity-doped layer and is of the same conductivity type as that of said first impurity-doped layer, and said third impurity-doped layer formed thereon.
Claim 5
Dependent Claim
22 words
A method according to claim 1, wherein said semiconductor device is a diode, and said second impurity-doped layer serves as a cathode.
Claim 6
Dependent Claim
28 words
A method according to claim 1, wherein said semiconductor device is a conductivity modulation type metal oxide semiconductor device, and said second impurity-doped layer serves as an emitter.
Claim 7
Dependent Claim
18 words
A method according to claim 1, wherein a roughness of the mirror-polished surface is not more than 500Å.
Claim 8
Dependent Claim
19 words
A method according to claim 1, wherein an annealing temperature falls within the range of 1,000° to 1,200° C.
Claim 9
Dependent Claim
29 words
A method according to claim 1, wherein an oxide film is formed on said third impurity-doped layer, comprising removing the oxide film from said third impurity-doped layer before bonding.
Claim 10
Dependent Claim
32 words
A method according to claim 1, wherein said first and second impurity-doped layers are of the same conductivity type, and said first semiconductor substrate consists of said first and third impurity-doped layers.
Claim 11
Dependent Claim
69 words
A method according to claim 1, wherein said first and second impurity-doped layers are of different conductivity types; and said first semiconductor substrate consists of said first impurity-doped layer, a fourth impurity-doped layer formed thereon which has a higher impurity concentration than that of said first impurity-doped layer and is of the same conductivity type as that of said first impurity-doped layer, and said third impurity-doped layer formed thereon.