Patent US4691291A successfully refreshed from Google Patents.
US4691291A
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Random sequence generators
Assignee: Thinking Machines Corp
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Filing: 1985-09-23
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Granted: 1987-09-01
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Expires: 2005-09-23
Abstract
Abstract A random sequence generator includes a plurality of successive stages in a closed loop wherein each of the stages includes a logic circuit and an input-output circuit, the input-output circuit having an input coupled to the output of the logic circuit. The logic circuit, which has n inputs, functions as a storage element or look-up table having 2 n addresses. Connection circuitry is provided for connecting one of the inputs of the logic circuit to the output of the input-output circuit of the same stage. Each of the remaining n-1 inputs of the logic circuit is connected to the output of the input-output circuit of a corresponding one of the other stages. An output signal having a plurality of sequential random values is generated at the output of each of the input-output circuits in response to an initial key signal applied to inputs of the input-output circuit.
Inventors
- 👤 Stephen Wolfram
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 12:49
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/58; G06F7/582; G06F7/584; H; H03; H03K; H03K3/00; H03K3/84; G06F2207/00; G06F2207/58; G06F2207/581; G06F2207/583
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
173 words
A random sequence generator, comprising a plurality of successive stages arranged in a closed loop wherein each of said stages includes a logic circuit having n inputs and an output, said logic circuit having 2 n addresses for generating a 0 or 1 at its output in accordance with the signal applied to its n inputs; an input-output circuit having a first input connected to the output of said logic circuit, a second input and an output; and connection means connecting one of the inputs of said logic circuit to the output of the input-output circuit of the same stage, another input of said logic circuit to the output of the input-output circuit of a preceding stage and still another input of said logic circuit to the output of the input-output circuit of a succeeding stage, an output signal having a plurality of sequential random values being generated at the output of each of said input-output circuits in response to an initial key signal applied to the second inputs of said input-output means.
Claim 2
Dependent Claim
173 words
A random sequence generator, comprising a plurality of successive stages arranged in a closed loop wherein each of said stages includes a logic circuit having n inputs and an output, said logic circuit having 2 n addresses for generating a 0 or 1 at its output in accordance with the signal applied to its n inputs; an input-output circuit having a first input connected to the output of said logic circuit, a second input and an output; and connection means connecting one of the inputs of said logic circuit to the output of the input-output circuit of the same stage, another input of said logic circuit to the output of the input-output circuit of a preceding stage and still another input of said logic circuit to the output of the input-output circuit of a succeeding stage, an output signal having a plurality of sequential random values being generated at the output of each of said input-output circuits in response to an initial key signal applied to the second inputs of said input-output means.
Claim 3
Dependent Claim
40 words
A random sequence generator as defined by claim 1 wherein the inputs of said logic circuit other than said one input are connected to corresponding outputs of the immediately previous r stages and the immediately succeeding r stages, where r=(n-1)/2.
Claim 4
Dependent Claim
76 words
A randum sequence generator as defined by claim 1 wherein each of said logic circuits comprises an OR gate and an exclusive OR gate, said exclusive OR gate having an input connected to the output of said OR gate and an output connected to the first input of said input-output circuit, said n inputs to said logic circuit including first and second inputs to said OR gate and a third input to said exclusive OR gate.
Claim 5
Dependent Claim
93 words
A random sequence generator as defined in claim 2 wherein each of said logic circuits comprises an OR gate and an exclusive OR gate, said exclusive OR gate having an input connected to the output of said OR gate and an output connected to the first input of said input-output circuit, said n inputs to said logic circuit including first and second inputs to said OR gate and a third input to said exclusive OR gate, the number of input n to the logic circuit being 3 and r being equal to one.
Claim 6
Dependent Claim
163 words
A random sequence generator, comprising a plurality of successive stages arranged in a closed loop wherein each of said stages includes an OR gate having a first input, a second input and an output; an exclusive OR gate having a first input, a second input connected to the output of said OR gate and an output; and an input-output circuit having a first input connected to the output of said exclusive OR gate, a second input and an output; and connection means connecting the outputs of each of said input-output circuits to the first input of the OR gate of the same stage, to the second input of the OR gate of the previous stage and to the first input of the exclusive OR gate of the succeeding stage, an output signal having a plurality of sequential random values being generated at the output of each of said input-output circuits in response to an initial key signal applied to the second inputs thereof.
Claim 7
Dependent Claim
163 words
A random sequence generator, comprising a plurality of successive stages arranged in a closed loop wherein each of said stages includes an OR gate having a first input, a second input and an output; an exclusive OR gate having a first input, a second input connected to the output of said OR gate and an output; and an input-output circuit having a first input connected to the output of said exclusive OR gate, a second input and an output; and connection means connecting the outputs of each of said input-output circuits to the first input of the OR gate of the same stage, to the second input of the OR gate of the previous stage and to the first input of the exclusive OR gate of the succeeding stage, an output signal having a plurality of sequential random values being generated at the output of each of said input-output circuits in response to an initial key signal applied to the second inputs thereof.
Claim 8
Dependent Claim
112 words
A random sequence generator as defined by claim 5 wherein each of said input-output circuits comprises a multiplexer having a first input, a second input and an output; and a flip-flop having an input connected to the output of said multiplexer, an output, and means for receiving sequential clock pulses, said flip-flop generating at its output a signal having a value corresponding to the value of the signal applied to its input during receipt of the previous clock pulse, the first and second inputs of said multiplexer corresponding to the first and second inputs of said input-output circuit and the output of said flip-flop corresponding to the output of said input-output circuit.
Claim 9
Dependent Claim
27 words
A random sequence generator as defined by claim 5 wherein the signal at the second input of the OR gate of each of said stages is inverted.
Claim 10
Dependent Claim
112 words
A random sequence generator as defined by claim 7 wherein each of said input-output circuits comprises a multiplexer having a first input, a second input and an output; and a flip-flop having an input connected to the output of said multiplexer, an output, and means for receiving sequential clock pulses, said flip-flop generating at its output a signal having a value corresponding to the value of the signal applied to its input during receipt of the previous clock pulse, the first and second inputs of said multiplexer corresponding to the first and second inputs of said input-output circuit and the output of said flip-flop corresponding to the output of said input-output circuit.
Claim 11
Independent Claim
130 words
A method of generating random sequence signals from a plurality of successive stages arranged in a closed loop wherein each of said stages includes a logic circuit having n inputs and an output, said method comprising the steps of applying a key input signal to each of said stages; transferring said key input signal to the output of its corresponding stage; and applying the output of each of said stages to an input of the logic circuit of the same stage and to the inputs of the logic circuits of 2r other of said stages, where r=(n-1)/2, the signals appearing at the outputs of each of said stages being a random sequence having a length determined by the number of stages in the generator and by the key input signal.
Claim 12
Independent Claim
130 words
A method of generating random sequence signals from a plurality of successive stages arranged in a closed loop wherein each of said stages includes a logic circuit having n inputs and an output, said method comprising the steps of applying a key input signal to each of said stages; transferring said key input signal to the output of its corresponding stage; and applying the output of each of said stages to an input of the logic circuit of the same stage and to the inputs of the logic circuits of 2r other of said stages, where r=(n-1)/2, the signals appearing at the outputs of each of said stages being a random sequence having a length determined by the number of stages in the generator and by the key input signal.
Claim 13
Dependent Claim
42 words
The method defined by claim 9 wherein the output of each stage is applied to the input of the logic circuit of the same stage and to the inputs of the logic circuits of only the 2r immediately previous and succeeding stages.
Claim 14
Independent Claim
179 words
A method of generating random sequence signals from a plurality of successive stages arranged in a closed loop wherein each of said stages includes an OR gate and an XOR gate and means for generating an output, said method comprising the steps of applying a key input signal to each of said stages; transferring said key input signal to the output of its corresponding stage; applying the output of each of said stages to a first input of the OR gate of the same stage, a second input of the OR gate of the previous stage and to a first input of the XOR gate of the succeeding stage; applying the output of the OR gate of each stage to a second input of the XOR gate of the same stage; and transferring the output of each XOR gate to the output of its own stage, the signals appearing at the outputs of each of said stages being a random sequence having a length determined by the number of stages in the generator and by the key input signal.
Claim 15
Independent Claim
179 words
A method of generating random sequence signals from a plurality of successive stages arranged in a closed loop wherein each of said stages includes an OR gate and an XOR gate and means for generating an output, said method comprising the steps of applying a key input signal to each of said stages; transferring said key input signal to the output of its corresponding stage; applying the output of each of said stages to a first input of the OR gate of the same stage, a second input of the OR gate of the previous stage and to a first input of the XOR gate of the succeeding stage; applying the output of the OR gate of each stage to a second input of the XOR gate of the same stage; and transferring the output of each XOR gate to the output of its own stage, the signals appearing at the outputs of each of said stages being a random sequence having a length determined by the number of stages in the generator and by the key input signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-08-31 | 1991-03-02 | 1991-09-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-08-31 | 1995-03-02 | 1995-09-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-08-31 | 1999-03-02 | 1999-09-01 | $7700.00 | Window Closed / Lapsed |