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US4691111A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiple gap optically activated switch

Assignee: United States Department of the Army
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Filing: 1986-09-03
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Granted: 1987-09-01
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Expires: 2006-09-03
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Abstract

Abstract Solid state optically activated switches in which a plurality of spaced cacts are arranged in a line on one of the broad surfaces of a semiconductor wafer and one or more bridging electrodes are arranged on the opposite broad surface thereof. The two end contacts are the switch terminals. This arrangement directs the electric field and the load current into the bulk of the semiconductor in a zig-zag fashion to provide a high hold-off voltage and a short conduction path. Also the bridging electrode can be used as a control electrode. A novel circuit utilizing such switches is shown.

Inventors

  • 👤 Lawrence J. Bovino

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 03:47
CPC Classifications
H; H10; H10F; H10F55/00; H10F55/20; H10F55/205; H03; H03K; H03K17/00; H03K17/51; H03K17/78

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 117 words
A high voltage pulse forming network comprising: a pair of similar optically activated switches; each switch comprising a bulk semiconductor wafer, a pair of spaced electrical contacts arranged in a line on one of the broad surfaces of said wafer, and a bridging electrode located on the opposite broad surface of said wafer overlapping and bridging the pair of spaced contacts; a source of high voltage connected to an electrical contact of a first optically activated switch; an output terminal connected to the other contact of said first switch; the other optically activated switch having an electrical contact connected to the bridging electrode of said first switch, with the other contact of the same connected to ground;
Claim 2
Dependent Claim 117 words
A high voltage pulse forming network comprising: a pair of similar optically activated switches; each switch comprising a bulk semiconductor wafer, a pair of spaced electrical contacts arranged in a line on one of the broad surfaces of said wafer, and a bridging electrode located on the opposite broad surface of said wafer overlapping and bridging the pair of spaced contacts; a source of high voltage connected to an electrical contact of a first optically activated switch; an output terminal connected to the other contact of said first switch; the other optically activated switch having an electrical contact connected to the bridging electrode of said first switch, with the other contact of the same connected to ground;
Claim 3
Dependent Claim 62 words
first light source means for illuminating and activating said first switch; second light source means for illuminating and activating the other switch; and control means for sequentially enabling said first and second light source means, said second light source means being enabled a predetermined short time after the first light source means is enabled to thereby disable the first optically activated switch.
Claim 4
Dependent Claim 62 words
first light source means for illuminating and activating said first switch; second light source means for illuminating and activating the other switch; and control means for sequentially enabling said first and second light source means, said second light source means being enabled a predetermined short time after the first light source means is enabled to thereby disable the first optically activated switch.
Claim 5
Dependent Claim 50 words
A pulse forming network as defined in 1 wherein the bulk semiconductor material of the pair of switches and the light wavelength of said first and second light source means are selected so that the light energy will substantially penetrate the entire semiconductor width which is covered by the contacts.
Claim 6
Dependent Claim 50 words
A pulse forming network as defined in 1 wherein the bulk semiconductor material of the pair of switches and the light wavelength of said first and second light source means are selected so that the light energy will substantially penetrate the entire semiconductor width which is covered by the contacts.

References Cited (Backward Citations)

US3842259A Cited
US4135099A Cited
US4447746A Cited
US4564770A Cited
US4568834A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-08-31 1991-03-02 1991-09-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-08-31 1995-03-02 1995-09-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-08-31 1999-03-02 1999-09-01 $7700.00 Window Closed / Lapsed

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