Optical detector circuit for photometric instrument

Claim 2

In an optical detection circuit for converting an analog signal into a digital representation of that signal and comprising a reference signal detection means for detecting a reference signal and a true signal detection means for detecting a signal from a sample of interest, the improvement comprising: a true signal integrator for integrating an analog signal from said true signal detection means upon command, inversion means for inverting an output signal from said true signal detection means during a zero blanking cycle and programming means for programming the operation of said true signal integration means through (a) a discharge cycle wherein the residual charge on said integration means is discharged to a reference level; (b) during a zero blanking cycle wherein the output from said inversion means is provided to the input of said integration means for integrating a blanking signal; (c) during a measuring cycle wherein an analog output from said true signal detection means is integrated by said integration means while inhibiting a signal from said inversion means; and (d) during a de-integration cycle in which the output of said integration means is representative of the difference between said true analog signal and said blanking signal.

Claim 3

The improvement as set forth in claim 1, further comprising a reference signal circuit for providing a reference signal to said integration means of said true signal detection circuit during said de-integration cycle.

Claim 4

The improvement as set forth in claim 2, wherein said reference signal detection circuit includes a reference signal detector and a reference signal integrator for integrating an analog output from said reference signal detector means during said measuring cycle, and providing a signal representative of said integrated reference analog signal to said true signal integration means during said de-integration cycle.

Claim 5

The improvement as set forth in claim 3, further including a comparator connected in circuit with the output of said true signal integrator.

Claim 6

The improvement as set forth in claim 3, further including a digital counter in circuit with the output of said integrator and programmed to count pulses during said de-integration cycle.

Claim 7

The improvement as set forth in claim 2, wherein said reference signal detection circuit includes a fixed voltage source in circuit with said reference signal detector.

Claim 8

The improvement as set forth in claim 2, wherein said reference signal integrator is programmed to discharge to a reference signal level during said discharge cycle, and to integrate said reference analog signal during said measuring cycle.

Claim 9

In an apparatus for converting a reference analog signal and a true analog signal into a digital representation indicative of said true signal of the type including a reference detection means for detecting a reference signal, and a true signal detection means for detecting a true signal, and an output circuit for providing a digital representation of the magnitude of said true analog signal relative to said reference signal, the improvement comprising: a reference signal integration means for integrating said reference analog signal upon command; a true signal integration means for integrating said true analog signal on command; and program means for commanding the operation of said reference signal integration means and said true signal integration means (a) during a discharge cycle in which charge stored on either of said integration means is discharged to a reference level; (b) during a measuring cycle in which said reference signal integration means integrates the reference analog signal while said true signal integration means integrates said true analog signal; and (c) during a de-integration cycle wherein said reference signal integration means de-integrates the signal obtained during said measuring cycle on said true analog signal detector.

Claim 10

In an apparatus for converting a reference analog signal and a true analog signal into a digital representation indicative of said true signal of the type including a reference detection means for detecting a reference signal, and a true signal detection means for detecting a true signal, and an output circuit for providing a digital representation of the magnitude of said true analog signal relative to said reference signal, the improvement comprising: a reference signal integration means for integrating said reference analog signal upon command; a true signal integration means for integrating said true analog signal on command; and program means for commanding the operation of said reference signal integration means and said true signal integration means (a) during a discharge cycle in which charge stored on either of said integration means is discharged to a reference level; (b) during a measuring cycle in which said reference signal integration means integrates the reference analog signal while said true signal integration means integrates said true analog signal; and (c) during a de-integration cycle wherein said reference signal integration means de-integrates the signal obtained during said measuring cycle on said true analog signal detector.

Claim 11

The improvement as set forth in claim 8, wherein inversion means for providing an inverted zero blanking signal to said integration means is in circuit with said true signal analog detector and said true signal integrator and commanded by said program means to integrate an inverted zero blanking signal during a zero blanking cycle preceding said measuring cycle.

Claim 12

The improvement as set forth in claim 8, wherein the length of each of said cycles is a predetermined multiple of a primary source of interference noise.

Claim 15

The method as set forth in claim 11, wherein the length of each of said discharge cycle, said measuring cycle, and said de-integration cycle is a predetermined multiple of a frequency of a source of primary interference.

Claim 16

The method as set forth in claim 12, further including the steps of integrating during a zero blanking cycle a zero blanking signal prior to said measuring cycle.