Analog to digital converter

Claim 2

An analog to digital converter for providing a digital output indication of the value of an input voltage appearing between first and second measurement terminals comprising, an integrator circuit including a high gain amplifier having first and second input terminals and an output terminal and an integrating capacitor coupling said output terminal and said first input terminal, and a second capacitor having one side connected to said second input terminal; first and second reference voltage levels; a digital output means including a source of clock pulses and a digital counter for accumulating said clock pulses; means operative in a first portion of an operating cycle of said counter for connecting said integrator first input terminal to said first reference voltage level for charging said integrating capacitor to a predetermined voltage and for charging said second capacitor to a voltage equal to the difference between said first reference levels and the voltage level at one of said measurement terminals, means operative during a second portion of a cycle of operation for switching the other side of said second capacitor to the other of said measurement terminals and for charging said integrating capacitor in a first direction at a rate proportional to said applied input voltage while simultaneously gating said digital output indicator to accumulate pulses in said digital counter from said digital clock, said second portion of said operation cycle being terminated when said digital counter has accumulated a predetermined number of counts from said source of clock pulses, and means operable at the completion of said second portion of said operating cycle to initiate a third portion of said operating cycle during which said integration first input terminal is connected to said second voltage reference level and said second capacitor is connected between said integrator second input terminal and the measurement terminal to which it was connected during said cycle first portion, and during which said integrating capacitor is discharged at a rate proportional to said first reference voltage level while simultaneously said digital output indicating means is operated to supply pulses from said source of clock pulses to said digital counters, the pulses to said digital counters being stopped when the voltage level across said integrating capacitor reaches the preset voltage to which said integrating capacitor was charged in the initial portion of said cycle.

Claim 3

An analog to digital converter circuit for providing a digital output indication of applied input voltage comprising, an analog stage; a digital output stage; and control circuitry; said digital output stage comprising a source of clock pulses and a digital counter, said source of clock pulses having a control input responsive to applied signals for supplying pulses to the input of said digital counter; said analog stage comprising, an integrator amplifier having first and second input terminals and an output terminal, an integrating capacitor connected between said output terminal and said first input terminal an integrator reference voltage supply, and a comparator having, first and second inputs, an output connected to the control input of said source of clock pulses, and a comparator reference voltage supply, the output terminal from said integrating amplifier being connected to one of said comparator inputs, the second of said comparator inputs being connected to said comparator reference voltage supply, a second capacitor having one side connected to said integrating amplifier second input terminal; first, second and third switching means, said first switching means selectively connecting said integrating amplifier input terminal to either said reference voltage supply or a point of potential reference, said second switching means selectively connecting the other side of said second capacitor either to said point of potential reference or to said applied input voltage, said third switching means connecting or disconnecting said comparator output terminal to said integrating amplifier second input terminal, said control circuitry comprising, first control means operable in an initial stage of operation, for operating said first switching means to connect said integrating amplifier first input terminal to said reference supply, for operating said second switching means to connect the other side of said second capacitor to said point of potential reference when said applied input voltage is negative, and for operating said third switching means to directly connect the output terminal from said comparator to said integrating amplifier second input terminal, said first operating stage continuing until both the input terminals of said integrating amplifier are substantially at said integrator reference voltage level, second control means operable upon completion of said first stage to operate said switching means in a second stage of operation such that said first switching means continues to connect said integrating amplifier first input terminal to said integrator source of reference voltage, said second switching means connects the other side of said second capacitor to said applied input voltage, if said applied input voltage is negative, and said third switching means disconnects the output of said comparator from the second input terminal of said integrating amplifier, the resulting change in output signal from said comparator actuating said source of clock pulses to supply clock pulses to said counter, said second stage of operation continuing until said source of clock pulses has applied pulses to said counter equal to a predetermined number, said control circuitry initiating, upon accumulation by said digital counter of said predetermined number of pulses a third stage of operation, third control means operable in said third stage of operation for operating said first switching means to connect said integrating amplifier first input terminal to said point of potential reference and for operating said second switching means to connect the other side of said second capacitor to said point of potential reference and said third switching means continuing to disconnect said comparator output terminal from said integrating amplifier second input terminal, said source of clock pulses continuing to supply pulses to said digital counter until said comparator output falls below said comparator reference voltage level.

Claim 4

An analog to digital converter circuit for providing a digital output indication of applied input voltage comprising, an analog stage; a digital output stage; and control circuitry; said digital output stage comprising a source of clock pulses and a digital counter, said source of clock pulses having a control input responsive to applied signals for supplying pulses to the input of said digital counter; said analog stage comprising, an integrator amplifier having first and second input terminals and an output terminal, an integrating capacitor connected between said output terminal and said first input terminal an integrator reference voltage supply, and a comparator having, first and second inputs, an output connected to the control input of said source of clock pulses, and a comparator reference voltage supply, the output terminal from said integrating amplifier being connected to one of said comparator inputs, the second of said comparator inputs being connected to said comparator reference voltage supply, a second capacitor having one side connected to said integrating amplifier second input terminal; first, second and third switching means, said first switching means selectively connecting said integrating amplifier input terminal to either said reference voltage supply or a point of potential reference, said second switching means selectively connecting the other side of said second capacitor either to said point of potential reference or to said applied input voltage, said third switching means connecting or disconnecting said comparator output terminal to said integrating amplifier second input terminal, said control circuitry comprising, first control means operable in an initial stage of operation, for operating said first switching means to connect said integrating amplifier first input terminal to said reference supply, for operating said second switching means to connect the other side of said second capacitor to said point of potential reference when said applied input voltage is negative, and for operating said third switching means to directly connect the output terminal from said comparator to said integrating amplifier second input terminal, said first operating stage continuing until both the input terminals of said integrating amplifier are substantially at said integrator reference voltage level, second control means operable upon completion of said first stage to operate said switching means in a second stage of operation such that said first switching means continues to connect said integrating amplifier first input terminal to said integrator source of reference voltage, said second switching means connects the other side of said second capacitor to said applied input voltage, if said applied input voltage is negative, and said third switching means disconnects the output of said comparator from the second input terminal of said integrating amplifier, the resulting change in output signal from said comparator actuating said source of clock pulses to supply clock pulses to said counter, said second stage of operation continuing until said source of clock pulses has applied pulses to said counter equal to a predetermined number, said control circuitry initiating, upon accumulation by said digital counter of said predetermined number of pulses a third stage of operation, third control means operable in said third stage of operation for operating said first switching means to connect said integrating amplifier first input terminal to said point of potential reference and for operating said second switching means to connect the other side of said second capacitor to said point of potential reference and said third switching means continuing to disconnect said comparator output terminal from said integrating amplifier second input terminal, said source of clock pulses continuing to supply pulses to said digital counter until said comparator output falls below said comparator reference voltage level.

Claim 5

An analog to digital converter in accordance with claim 2 wherein said integrator amplifier has a unipolar power supply.

Claim 6

An analog to digital converter in accordance with claim 2 wherein said control circuitry is operable during said first and third stage, if said input voltage is positive, to operate said second switching means to connect the other side of said second capacitor to said applied input voltage and is operable during said second stage, if said applied input voltage is positive, to operate said second switching means to connect the other side of said second capacitor to said point of potential reference.

Claim 7

An analog to digital converter in accordance with claim 2 wherein said integrating amplifier is a high gain amplifier and said first terminal is an inverting input terminal and said second terminal is a non-inverting input terminal.

Claim 8

An analog to digital converter in accordance with claim 5 wherein said comparator circuit comprises a high gain amplifier wherein said second input is a non-inverting input terminal and said first input is an inverting input terminal.

Claim 9

An analog to digital converter circuit in accordance with claim 2 wherein said first switching means includes a resistor which in said first stage is connected between said integrating amplifier first input terminal and said intEgrator reference supply voltage and in said third stage is connected between said integrating amplifier first input terminal and said point of potential reference.

Claim 10

An analog to digital converter circuit in accordance with claim 2 wherein said first switching means includes first and second resistors, said first resistor always being connected between said integrating amplifier first input terminal and said integrator reference voltage supply; said second resistor being connected between said point of potential reference and said integrating amplifier first input terminal during said third stage of operation.

Claim 11

An analog to digital converter circuit in accordance with claim 2 wherein said control circuitry comprises a rate conversion clock coupled to provide toggling pulses to a plurality of flip-flops whereby said flip-flops actuate said switching means to terminate said first stage and initiate said second stage in response to a pulse from said conversion rate clock and to terminate said second stage and initiate said third stage in response to a signal from the output of said comparator.

Claim 12

An analog to digital converter in accordance with claim 1 wherein when said applied input voltage level is of opposite polarity from said first reference voltage level with respect to said second reference voltage and is connected during said second portion of the operating cycle between said integrator second input terminal and said applied input voltage level.

Claim 13

An analog to digital converter in accordance with claim 10 wherein when said applied input voltage level is of the same polarity as said first reference voltage level with respect to said second reference voltage level said second comparator being connected during said first and third portions of the operating cycle between said integrator second input terminal and said second portion of the operations cycle between said integration second input terminal and said second reference voltage level.

Claim 14

An analog to digital converter in accordance with claim 1 wherein said digital output means includes means providing an output indicator of the polarity of said applied input voltage level.

Claim 15

An analog to digital converter in accordance with claim 11 and including a comparator for determining when the voltage level at the output terminal of said integration amplifier falls below a predetermined level.

Claim 16

An analog to digital converter in accordance with claim 12 wherein said comparator means comprises a high gain amplifier having an input terminal coupled to said integrator amplifier output terminal and a second input terminal coupled to said first reference voltage level.

Claim 17

An analog to digital converter in accordance with claim 16 and including means operable in said first portion of the operating cycle to directly connect saId comparator amplifier output terminal to said integrator amplifier second input terminal to stabilize both of said amplifiers.