Patent US4686689A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4686689A Expired / Lapsed US ⏱️ 0.0 years remaining

Phase-locked loop circuit

Assignee: GRAHAM-PATTEN SYSTEMS Inc
•
Filing: 1986-07-24
•
Granted: 1987-08-11
•
Expires: 2006-07-24
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A phase-locked loop circuit receives an input signal that has a predetermined frequency during a succession of symbol intervals and of which the phase during a given symbol interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from 0 to (N-1), and generates a reference signal of which the phase has a desired relationship to the phase of the input signal during the reference interval. The circuit comprises a controllable oscillator that is responsive to a control signal to generate the reference signal, the frequency of the reference signal being equal to the predetermined frequency when the value of the control signal is zero. The circuit also comprises a demodulator for generating a first signal representative of the sine of the phase of the input signal relative to the reference signal and for generating a second signal representative of the cosine of the phase of the input signal relative to the reference signal, and a function generator for receiving the first and second signals and generating the control signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to phase of the input signal relative to the reference signal is positive.

Inventors

  • 👤 William L. Rorden

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 20:59
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/087; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273; H04L27/0014; H04L2027/0044; H04L2027/0063; H04L2027/0067

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 283 words
A phase-locked loop circuit for receiving an input signal that has a predetermined frequency during a succession of intervals and of which the phase during a given interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from 0 to N-1, the circuit being operative to generate a reference signal of which the phase bears a desired relationship to the phase of the input signal during the reference interval and comprising a controllable oscillator that is responsive to a control signal to generate the reference signal, the frequency of the reference signal being a function of the value of the control signal and bearing a predetermined relationship to the predetermined frequency when the value of the control signal is substantially zero, and the circuit also comprising a demodulator for providing an output that unambiguously defines the phase of the input signal relative to the reference signal, and a function generator for receiving the output of the demodulator and generating the control signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to the phase of the input signal relative to the reference signal is such that a change in the value of the control signal causes the frequency of the reference signal to change in such a manner as to restore the value of the control signal to zero.
Claim 2
Dependent Claim 283 words
A phase-locked loop circuit for receiving an input signal that has a predetermined frequency during a succession of intervals and of which the phase during a given interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from 0 to N-1, the circuit being operative to generate a reference signal of which the phase bears a desired relationship to the phase of the input signal during the reference interval and comprising a controllable oscillator that is responsive to a control signal to generate the reference signal, the frequency of the reference signal being a function of the value of the control signal and bearing a predetermined relationship to the predetermined frequency when the value of the control signal is substantially zero, and the circuit also comprising a demodulator for providing an output that unambiguously defines the phase of the input signal relative to the reference signal, and a function generator for receiving the output of the demodulator and generating the control signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to the phase of the input signal relative to the reference signal is such that a change in the value of the control signal causes the frequency of the reference signal to change in such a manner as to restore the value of the control signal to zero.
Claim 3
Dependent Claim 52 words
A circuit according to claim 1, wherein the output of the demodulator comprises a first signal representative of the cosine of the phase of the input signal relative to the reference signal and a second signal representative of the sine of the phase of the input signal relative to the reference signal.
Claim 4
Dependent Claim 24 words
A circuit according to claim 2, wherein the demodulator comprises first and second linear phase detectors which provide said first and second signals respectively.
Claim 5
Dependent Claim 77 words
A circuit according to claim 1, wherein the output of the demodulator comprises first and second signals such that for small values of the phase of the input signal relative to the reference signal the first signal is substantially representative of the cosine of the phase of the input signal relative to the reference signal and the second signal is substantially representative of the sine of the phase of the input signal relative to the reference signal.
Claim 6
Dependent Claim 126 words
A circuit according to claim 1, wherein the output of the demodulator comprises first and second signals, N is equal to 4, and the function generator is such that the value of the control signal is given by the relationship V.sub.c =S.sub.1 * V.sub.y +S.sub.2 * V.sub.x where V c represents the value of the control signal, V x represents the value of the first signal, V y represents the value of the second signal, S 1 is equal to 1 if V x is greater than 0 and is equal to -1 if V x is less than 0 and S 2 is equal to 1 if V y is less than 0 and is equal to -1 if V y is greater than 0.
Claim 7
Dependent Claim 66 words
A circuit according to claim 1, where the controllable oscillator comprises a voltage controlled oscillator having a control input, and a loop filter connected to receive the control signal generated by the function generator and to apply a signal to the control input of the oscillator, which signal has a component that is proportional to the voltage of the control signal received by the loop filter.
Claim 8
Dependent Claim 40 words
A circuit according to claim 6, wherein the signal applied to the control input of oscillator also has a component proportional to the integral with respect to time of the voltage of the control signal received by the loop filter.
Claim 9
Dependent Claim 276 words
A phase-locked loop circuit for receiving an input signal that has a predetermined frequency during a succession of intervals and of which the phase during a given interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from 0 to N-1, the circuit being operative to generate a reference signal of which the frequency bears a desired relationship to said predetermined frequency and comprising a controllable oscillator that is responsive to a control signal to generate the reference signal, the frequency of the reference signal being a function of the value of the control signal and bearing a predetermined relationship to the predetermined frequency when the value of the control signal is substantially zero, and the circuit also comprising a demodulator for providing an output that unambiguously defines the phase of the input signal relative to the reference signal, and a function generator for receiving the output of the demodulator and generating the control signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to the phase of the input signal relative to the reference signal is such that a change in the value of the control signal causes the frequency of the reference signal to change in such a manner as to restore the value of the control signal to zero.
Claim 10
Dependent Claim 276 words
A phase-locked loop circuit for receiving an input signal that has a predetermined frequency during a succession of intervals and of which the phase during a given interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from 0 to N-1, the circuit being operative to generate a reference signal of which the frequency bears a desired relationship to said predetermined frequency and comprising a controllable oscillator that is responsive to a control signal to generate the reference signal, the frequency of the reference signal being a function of the value of the control signal and bearing a predetermined relationship to the predetermined frequency when the value of the control signal is substantially zero, and the circuit also comprising a demodulator for providing an output that unambiguously defines the phase of the input signal relative to the reference signal, and a function generator for receiving the output of the demodulator and generating the control signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to the phase of the input signal relative to the reference signal is such that a change in the value of the control signal causes the frequency of the reference signal to change in such a manner as to restore the value of the control signal to zero.
Claim 11
Dependent Claim 27 words
A circuit according to claim 8, wherein the function relating the frequency of the reference signal to the value of the control signal is a proportional function.
Claim 12
Dependent Claim 29 words
A circuit according to claim 8, wherein the function relating the frequency of the reference signal to the value of the control signal is a proportional plus integral function.
Claim 13
Independent Claim 264 words
A method of generating a reference signal in response to an input signal that has a predetermined frequency during a succession of intervals and of which the phase during a given interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from zero to N-1 the frequency of the reference signal bearing a desired relationship to said predetermined frequency, said method comprising generating the reference signal in response to a control signal, the frequency of the reference signal being a function of the value of the control signal and bearing said desired relationship to the predetermined frequency when the value of the control signal is substantially zero, generating an unambiguous indication of the phase of the input signal relative to the reference signal, and generating the control signal as a function of the phase of the input signal relative to the reference signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to the phase of the input signal relative to the reference signal is such that a change in the value of the control signal causes the frequency of the reference signal to change in such a manner as to restore the value of the control signal to zero.
Claim 14
Independent Claim 264 words
A method of generating a reference signal in response to an input signal that has a predetermined frequency during a succession of intervals and of which the phase during a given interval is related to the phase during a reference interval by the angle 2nπ/N, where N is a positive integer and n is an integer in the range from zero to N-1 the frequency of the reference signal bearing a desired relationship to said predetermined frequency, said method comprising generating the reference signal in response to a control signal, the frequency of the reference signal being a function of the value of the control signal and bearing said desired relationship to the predetermined frequency when the value of the control signal is substantially zero, generating an unambiguous indication of the phase of the input signal relative to the reference signal, and generating the control signal as a function of the phase of the input signal relative to the reference signal such that when the phase of the input signal relative to the reference signal is equal to 2nπ/N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to the phase of the input signal relative to the reference signal is such that a change in the value of the control signal causes the frequency of the reference signal to change in such a manner as to restore the value of the control signal to zero.
Claim 15
Dependent Claim 27 words
A method according to claim 11, wherein the function relating the frequency of the reference signal to the value of the control signal is a proportional function.
Claim 16
Dependent Claim 30 words
A circuit according to claim 11, wherein the function relating to the frequency of the reference signal to the value of the control signal is a proportional plus integral function.

References Cited (Backward Citations)

US4027265A Cited
US4484337A Cited
US4555667A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-08-10 1991-02-09 1991-08-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-08-10 1995-02-09 1995-08-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-08-10 1999-02-09 1999-08-11 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag