Patent US4481583A successfully refreshed from Google Patents.
Patent US4684971A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4684971A Expired / Lapsed US ⏱️ 0.0 years remaining

Ion implanted CMOS devices

Assignee: Nokia Bell Labs
•
Filing: 1981-03-13
•
Granted: 1987-08-04
•
Expires: 2001-03-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A CMOS structure and method of manufacture are disclosed for achieving a high packing density in integrated circuits. Each device includes at least one high concentration surface region, (18 and 20) and at least one lower concentration background region (15 and 17) which permit the devices to be made close together. The devices can be fabricated with a single mask by using a lift-off technique in accordance with the method of the invention.

Inventors

  • 👤 Richard S. Payne

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 10:10
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0191; H10D84/02; H10D84/03; H10D84/038; H10P; H10P30/00; H10P30/20; H10P30/22; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 155 words
A CMOS device comprising a substrate (10) of a first conductivity type having a major surface, a first tub region (17) of opposite conductivity type formed at said surface wherein source and drain regions (23 and 24) are formed, a second tub region (15) of the same conductivity type but higher impurity concentration than said substrate wherein source and drain regions (21 and 22) are formed, CHARACTERIZED IN THAT there is included in each of said tub regions a surface region (20 and 18 respectively) covering essentially the same area as said tub region and having the same conductivity type but a greater impurity concentration than said tub region, and extending to a depth at least as great as that of said source and drain regions such that the impurities of the tub regions overlap but are compensated for by the impurities of the surface region of opposite conductivity type in the area of overlap.
Claim 2
Dependent Claim 155 words
A CMOS device comprising a substrate (10) of a first conductivity type having a major surface, a first tub region (17) of opposite conductivity type formed at said surface wherein source and drain regions (23 and 24) are formed, a second tub region (15) of the same conductivity type but higher impurity concentration than said substrate wherein source and drain regions (21 and 22) are formed, CHARACTERIZED IN THAT there is included in each of said tub regions a surface region (20 and 18 respectively) covering essentially the same area as said tub region and having the same conductivity type but a greater impurity concentration than said tub region, and extending to a depth at least as great as that of said source and drain regions such that the impurities of the tub regions overlap but are compensated for by the impurities of the surface region of opposite conductivity type in the area of overlap.
Claim 3
Dependent Claim 43 words
The device according to claim 1 wherein the surface impurity concentration of the surface regions lies within the range 0.5-5×10 16 ions/cm 3 and the surface impurity concentration of the tub regions lies within the range 10 15 -10 16 ions/cm 3 .
Claim 4
Dependent Claim 25 words
The device according to claim 1 wherein the source and drain region of adjacent transistors (22 and 23) are placed no more than 5μ apart.
Claim 5
Dependent Claim 33 words
The device according to claim 1 wherein the tub and surface regions of the first conductivity type comprise phosphorous impurities and the tub and surface regions of opposite conductivity type comprise boron impurities.

References Cited (Backward Citations)

US3821781A Cited
US4067100A Cited
US4217149A Cited
US4212100A Cited
US4231055A Cited
JPS5552266A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-08-03 1991-02-02 1991-08-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-08-03 1995-02-02 1995-08-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-08-03 1999-02-02 1999-08-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag