Patent US4683499A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4683499A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for generating a pixel synchronizing signal in a picture input scanning apparatus and a reproduction record scanning apparatus and apparatus therefor

Assignee: Dainippon Screen Manufacturing Co Ltd
•
Filing: 1985-12-31
•
Granted: 1987-07-28
•
Expires: 2005-12-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A pixel synchronizing signal between a picture input scanning apparatus and a reproduction record scanning apparatus is generated by dividing frequency of a reference signal according to scanning speed in the main scanning direction into a plurality of slightly different frequencies from one another by a plurality of dividers, pairs of the frequencies are converted into heterodyne frequencies by at least a pair of phase synchronizing loop circuits coupled with the heterodyne frequencies of mutual output frequencies thereof, and frequencies of output signals of the phase synchronizing loop circuits of which feeding back signals are the heterodyne frequencies among the phase synchronizing loop circuits are divided to make them output frequencies. The apparatus for practicing the method comprises a reference pulse generating means for generating a pulse signal of which frequency is varied according to the scanning speed in the main scanning direction, at least a pair of frequency dividers converting their frequencies into two signals having slightly different frequencies, at least a pair of phase synchronizing loop circuits converting frequencies of output signals of the dividers, a frequency mixer for outputting heterodyne frequency to a feeding back frequency divider and a frequency divider for dividing frequency of an output signal of the phase synchronizing loop circuit to which the signal of heterodyne frequency is to be fed.

Inventors

  • 👤 Akira Kuwabara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 16:56
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/32; H04N1/36; H04N1/04; H04N1/047; H04N1/053; H04N1/06; H04N1/113; H04N1/1135; H04N2201/00; H04N2201/024; H04N2201/02406; H04N2201/02439; H04N2201/02443; H04N2201/04; H04N2201/047; H04N2201/04701; H04N2201/0471; H04N2201/04715; H04N2201/04724; H04N2201/04734; H04N2201/04744; H04N2201/04746; H04N2201/04753; H04N2201/04758; H04N2201/04767; H04N2201/04768; H04N2201/04772; H04N2201/04794; H04N2201/04798

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 111 words
A pixel synchronizing signal generating method in a picture input scanning apparatus and a reproduction record scanning apparatus characterized by comprising steps of: dividing frequency of a reference signal according to main scanning speed of the picture scanning apparatus into a plurality of slightly different frequencies from one another by a plurality of frequency dividers; converting pairs of said plurality of frequencies by at least a pair of phase synchronizing loop circuits coupled with heterodyne frequencies of mutual output frequencies; dividing appropriately frequencies of output signals of phase synchronizing loop circuits of which feeding back signals are said heterodyne frequencies among said phase synchronizing loop circuits to make them output frequencies.
Claim 2
Dependent Claim 111 words
A pixel synchronizing signal generating method in a picture input scanning apparatus and a reproduction record scanning apparatus characterized by comprising steps of: dividing frequency of a reference signal according to main scanning speed of the picture scanning apparatus into a plurality of slightly different frequencies from one another by a plurality of frequency dividers; converting pairs of said plurality of frequencies by at least a pair of phase synchronizing loop circuits coupled with heterodyne frequencies of mutual output frequencies; dividing appropriately frequencies of output signals of phase synchronizing loop circuits of which feeding back signals are said heterodyne frequencies among said phase synchronizing loop circuits to make them output frequencies.
Claim 3
Dependent Claim 112 words
A method for generating pixel synchronizing signal according to claim 1, wherein frequency of said reference signal according to the main scanning of said is converted by a first phase synchronizing loop circuit, said converted frequency is divided into two frequencies different slightly with each other by a pair of frequency dividers, said two frequencies are converted by a second phase synchronizing loop circuit and a third phase synchronizing loop circuit which are couple each other with a heterodyne frequency of mutual output frequencies, and an output frequency of the second phase synchronizing loop circuit of which feeding back signal is said heterodyne frequency is appropriately divided to make an output frequency.
Claim 4
Dependent Claim 40 words
A method for generating a pixel synchronizing signal according to claim 2, wherein in the case of the divided output frequency being slightly varied, said converted frequencies of the second and the third phase synchronizing loop circuit are simultaneously varied.
Claim 5
Dependent Claim 55 words
A method for generating a pixel synchronizing signal according to claim 2 or 3, wherein difference between denominators of frequency division ratios of a pair of the frequency dividers which divide the output frequency of the first phase synchronizing loop circuit is less than 10 and values of the denominators are integers within three figures.
Claim 6
Independent Claim 166 words
An apparatus for generating pixel synchronizing signal in a picture input scanning apparatus and a reproduction record scanning apparatus characterized by comprising: a reference pulse generating means for generating a pulse signal of which frequency is varied according to a main scanning speed in associating with a main scanning means of the picture scanning apparatus; a pair of frequency dividers which convert their frequencies of output signals into two signals of which frequencies are slightly different from each other; a pair of phase synchronizing loop circuits which convert frequencies of output signals of said both frequency dividers respectively; a frequency mixer for outputting a signal of heterodyne frequency obtained by miximg frequencies of output signals of said pair of phase synchronizing loop circuits to a feeding back frequency divider in either of said pair of phase synchronizing loop circuits; and a frequency divider for dividing frequency of an output signal of said phase synchronizing loop circuit to which the signal of the heterodyne frequency is fed.
Claim 7
Independent Claim 166 words
An apparatus for generating pixel synchronizing signal in a picture input scanning apparatus and a reproduction record scanning apparatus characterized by comprising: a reference pulse generating means for generating a pulse signal of which frequency is varied according to a main scanning speed in associating with a main scanning means of the picture scanning apparatus; a pair of frequency dividers which convert their frequencies of output signals into two signals of which frequencies are slightly different from each other; a pair of phase synchronizing loop circuits which convert frequencies of output signals of said both frequency dividers respectively; a frequency mixer for outputting a signal of heterodyne frequency obtained by miximg frequencies of output signals of said pair of phase synchronizing loop circuits to a feeding back frequency divider in either of said pair of phase synchronizing loop circuits; and a frequency divider for dividing frequency of an output signal of said phase synchronizing loop circuit to which the signal of the heterodyne frequency is fed.
Claim 8
Independent Claim 187 words
An apparatus for generating a pixel synchronizing signal characterized by comprising: a reference pulse generating means for generating a pulse signal of which frequency is varied according to a main scanning speed in associating with a main scanning means of the picture scanning apparatus; a first phase synchronizing loop circuit for converting frequency of an output reference pulse signal fo said pulse generating means; a pair of frequency dividers for converting an output signal of the first phase synchronizing loop circuit into two signals of which frequencies are slightly different from each other; a pair of phase synchronizing circuits which convert frequencies of outputs signals of said two frequency dividers respectively and a third phase sinchrnozing loop circuit; a frequencymixer which outputs a heterodyne frequency obtained by mixing output signals of the second and the third phase synchronizing circuits with other to a feeding back frequency divider of either of the second phase synchronizing circuit or the third phase synchronizing circuit; and a frequency divider which divides an output signal of the phase synchronizing loop circuit to which said signal of said heterodyne frequency is fed back.
Claim 9
Independent Claim 187 words
An apparatus for generating a pixel synchronizing signal characterized by comprising: a reference pulse generating means for generating a pulse signal of which frequency is varied according to a main scanning speed in associating with a main scanning means of the picture scanning apparatus; a first phase synchronizing loop circuit for converting frequency of an output reference pulse signal fo said pulse generating means; a pair of frequency dividers for converting an output signal of the first phase synchronizing loop circuit into two signals of which frequencies are slightly different from each other; a pair of phase synchronizing circuits which convert frequencies of outputs signals of said two frequency dividers respectively and a third phase sinchrnozing loop circuit; a frequencymixer which outputs a heterodyne frequency obtained by mixing output signals of the second and the third phase synchronizing circuits with other to a feeding back frequency divider of either of the second phase synchronizing circuit or the third phase synchronizing circuit; and a frequency divider which divides an output signal of the phase synchronizing loop circuit to which said signal of said heterodyne frequency is fed back.

References Cited (Backward Citations)

US4000368A Cited
US4146908A Cited
US4203078A Cited
US4346410A Cited
US4254439A Cited
US4349847A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-07-27 1991-01-26 1991-07-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-07-27 1995-01-26 1995-07-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-07-27 1999-01-26 1999-07-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag