Patent US4683487A successfully refreshed from Google Patents.
US4683487A
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Heterojunction bipolar transistor
Assignee: Hitachi Ltd
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Filing: 1985-11-06
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Granted: 1987-07-28
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Expires: 2005-11-06
Abstract
Abstract A collector lead-out portion and a base lead-out portion are formed so as to oppose to each other in such a manner that active regions including a collector, a base and an emitter are sandwiched therebetween. The collector lead-out portion and the base lead-out portion are formed by ion implantation or selective epitaxial growth. Thus, a planar type heterojunction bipolar transistor capable of a high density of integration is formed.
Inventors
- 👤 Kiichi Ueyanagi
- 👤 Susumu Takahashi
- 👤 Toshiyuki Usagawa
- 👤 Yasunari Umemoto
- 👤 Toshihisa Tsukada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 18:41
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/113; H10D10/00; H10D10/80; H10D10/821; H10D64/00; H10D64/20; H10D64/23; H10D64/231; H10D64/27; H10D64/281
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
160 words
A heterojunction bipolar transistor having a main surface and comprising active regions which include at least one heterojunction, the active regions having top and bottom surfaces extending in the same direction as the main surface and side surfaces extending between the top and bottom surfaces, a base region lead-out portion which is formed spaced from a side surface of said active regions and extending to said main surface, with an insulating region filling the space between the side surface of the active regions and the base region lead-out portion, and a collector region lead-out portion which is formed spaced from another side surface of said active regions and extending to said main surface, with another insulating region filling the space between said another side surface of the active regions and the collector region lead-out portion, wherein the insulating region and the another insulating region are regions in self-alignment with an emitter electrode on the main surface of the bipolar transistor.
Claim 2
Dependent Claim
160 words
A heterojunction bipolar transistor having a main surface and comprising active regions which include at least one heterojunction, the active regions having top and bottom surfaces extending in the same direction as the main surface and side surfaces extending between the top and bottom surfaces, a base region lead-out portion which is formed spaced from a side surface of said active regions and extending to said main surface, with an insulating region filling the space between the side surface of the active regions and the base region lead-out portion, and a collector region lead-out portion which is formed spaced from another side surface of said active regions and extending to said main surface, with another insulating region filling the space between said another side surface of the active regions and the collector region lead-out portion, wherein the insulating region and the another insulating region are regions in self-alignment with an emitter electrode on the main surface of the bipolar transistor.
Claim 3
Dependent Claim
30 words
A heterojunction bipolar transistor according to claim 1, wherein said collector region lead-out portion is formed in opposition to said base region lead-out portion with said active regions interposed therebetween.
Claim 4
Dependent Claim
32 words
A heterojunction bipolar transistor according to claim 1, wherein said main surface is substantially flat, and said emitter electrode, said base electrode and said collector electrode are formed on the flat surface.
Claim 5
Dependent Claim
24 words
A heterojunction bipolar transistor according to claim 3, wherein said collector lead-out portion is an impurity containing region which is formed by ion implantation.
Claim 6
Dependent Claim
52 words
A heterojunction bipolar transistor according to claim 4, wherein said collector lead-out portion is an impurity containing region which is formed by ion implantation, and the ion implantation is so performed that a peak of an impurity concentration reaches a depth corresponding substantially to the base region of said heterojunction bipolar transistor.
Claim 7
Dependent Claim
18 words
A heterojunction bipolar transistor according to claim 4, wherein said impurity containing region is of the n-conductivity type.
Claim 8
Dependent Claim
21 words
A heterojunction bipolar transistor according to claim 3, wherein said collector lead-out portion is constructed of a selectively grown semiconductor layer.
Claim 9
Dependent Claim
34 words
A heterojunction bipolar transistor according to claim 3, wherein said active regions are isolated from said base lead-out portion and said collector lead-out portion by damaged regions which are formed by impurity ion implantation.
Claim 10
Dependent Claim
25 words
A heterojunction bipolar transistor according to claim 3, wherein said collector lead-out portion and said base lead-out portion are in self-alignment to said emitter electrode.
Claim 11
Dependent Claim
25 words
A heterojunction bipolar transistor according to claim 4, wherein said collector lead-out portion and said base lead-out portion are in self-alignment to said emitter electrode.
Claim 12
Dependent Claim
53 words
A heterojunction bipolar transistor according to claim 3, wherein an insulating region between said active regions and said base region lead-out portion is formed to reach a depth at which it reaches a depletion layer on an emitter side to be formed at an interface between the emitter region and the base region.
Claim 13
Dependent Claim
52 words
A heterojunction bipolar transistor according to claim 8, wherein the insulating region between said active regions and said base lead-out portion is formed to reach a depth at which it reaches a depletion layer on an emitter side to be formed at an interface between the emitter region and the base region.
Claim 14
Dependent Claim
95 words
A heterojunction bipolar transistor according to claim 1, wherein the bipolar transistor comprises a plurality of layers forming respectively an emitter region, a base region and a collector region, the emitter, base and collector regions constituting said active regions of said bipolar transistor; wherein the bipolar transistor further includes emitter, base and collector electrodes respectively electrically connected to said emitter, base and collector regions; and wherein the collector region lead-out portion electrically connects the collector region to the collector electrode and the base region lead-out portion electrically connects the base region to the base electrode.
Claim 15
Dependent Claim
28 words
A heterojunction bipolar transistor according to claim 13, wherein said collector region lead-out portion and said base region lead-out portion are portions in self-alignment with said emitter electrode.
Claim 16
Dependent Claim
28 words
A heterojunction bipolar transistor according to claim 1, wherein said collector region lead-out portion and said base region lead-out portion are portions in self-alignment with said emitter electrode.
Claim 17
Dependent Claim
62 words
A heterojunction bipolar transistor according to claim 15, wherein the collector region lead-out portion and the base region lead-out portion are portions, formed by ion implantation, in self-alignment with the emitter electrode, and wherein the insulating region and the another insulating region are damaged layers, formed by ion implantation and annealing, the ion implantation being formed in self-alignment with the emitter electrode.
Claim 18
Dependent Claim
20 words
A heterojunction bipolar transistor according to claim 16, wherein the emitter electrode is made of a refractory ohmic electrode material.
Claim 19
Dependent Claim
31 words
A heterojunction bipolar transistor according to claim 17, wherein the ion-implanted region for the isolation between said active regions and said collector lead-out portion is formed deeper than the base region.
Claim 20
Dependent Claim
37 words
A heterojunction bipolar transistor according to claim 1, wherein the insulating region and the another insulating region are damaged layers, formed by ion implantation and annealing, the ion implantation being performed in self-alignment with the emitter electrode.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-27 | 1991-01-26 | 1991-07-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-27 | 1995-01-26 | 1995-07-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-27 | 1999-01-26 | 1999-07-28 | $7700.00 | Window Closed / Lapsed |