Fiber optic receiver having a method and an apparatus for data clock extraction

Claim 2

A data clock extractor comprising: a full wave rectifier providing an output signal having peaks indicative of transitions in a data stream; a peak detector for detecting peaks coupled to receive signals from said full wave rectifier; an oscillator; and means, coupled between said peak detector and said oscillator, for synchronizing said oscillator with said peaks from said peak detector to extract a data clock.

Claim 3

The data clock extractor as recited in claim 1 further comprising: means for providing a first data signal, and means for providing a second data signal identical to said first data signal but shifted 180° in phase; and wherein said full wave rectifier comprises a first transistor having a base coupled to said means for providing a first data signal, having an emitter and having a collector, and a second transistor having a base coupled to said means for providing a first data signal, having an emitter coupled to said emitter of said first transistor and having a collector coupled to said collector of said first transistor.

Claim 4

The data clock extractor as recited in claim 1 wherein said oscillator comprises a tank circuit.

Claim 5

A fiber optic receiver comprising: a photodetector; a data amplifier coupled to said photodetector; a data clock extractor coupled to said data amplifier and comprising a full wave rectifier providing an output signal having peaks indicative of transitions in a data stream, said full wave rectifier being coupled to said data amplifier. a peak detector for detecting peaks coupled to receive signals from said full wave rectifier, an oscillator; and means, coupled between said peak detector and said oscillator, for stimulating said oscillator with said peaks detected by said peak detector to extract a data clock; and a data retiming circuit coupled to said data amplifier and coupled to said oscillator of said data clock extractor.

Claim 6

A fiber optic receiver comprising: a photodetector; a data amplifier coupled to said photodetector; a data clock extractor coupled to said data amplifier and comprising a full wave rectifier providing an output signal having peaks indicative of transitions in a data stream, said full wave rectifier being coupled to said data amplifier. a peak detector for detecting peaks coupled to receive signals from said full wave rectifier, an oscillator; and means, coupled between said peak detector and said oscillator, for stimulating said oscillator with said peaks detected by said peak detector to extract a data clock; and a data retiming circuit coupled to said data amplifier and coupled to said oscillator of said data clock extractor.

Claim 7

The fiber optic receiver as recited in claim 4 further comprising: means for providing a first data signal, and means for providing a second data signal identical to said first data signal but shifted 180° in phase; and wherein said full wave rectifier comprises a first transistor having a base coupled to said means for providing a first data signal, having an emitter and having a collector, and a second transistor having a base coupled to said means for providing a second data signal, having an emitter coupled to said emitter of said first transistor and having a collector coupled to said collector of said first transistor.

Claim 8

The fiber optic receiver as recited in claim 4 wherein said oscillator comprises a tank circuit.

Claim 9

The fiber optic receiver as recited in claim 4 further comprising: a baseline claim and automatic gain control detector comprising means, coupled to said data amplifier, for providing a first data signal, means, coupled to said data amplifier, for providing a second data signal identical to said first data signal but shifted 180° in phase, a first clamping diode having a first electrode coupled to said means for providing a first data signal and having a second electrode coupled to a common potential, a second clamping diode having a first electrode coupled to said means for providing a second data signal and having a second electrode coupled to the common potential, a first transistor having a base coupled to said first electrode of said first clamping diode, having an emitter and having a collector; a second transistor having a base coupled to said first electrode of said second clamping diode, having an emitter coupled to said emitter of said first transistor, and having a collector coupled to said collector of said first transistor; and an automatic gain control amplifier having an input coupled to an output of said coupled collectors of said first transistor and said second transistor of said baseline clamp and automatic gain control detector and having an output coupled to an input of said data amplifier.