Electric resistor consisting of at least two monolithically combined mis-field effect transistors for integrated semiconductor circuits

Claim 1

Electric resistor, comprising at least two simultaneously produced monolithically combined MIS field-effect transistors for integrated circuits, each of said transistors having a source electrode and a drain electrode defining a source-drain path, a gate terminal and a channel width-to-channel length ratio, said transistors being connected in series with each other through said source-drain paths, each of said transistors, respectively, having the gate terminal thereof connected to one of the source and drain electrodes thereof, said transistors being different from each other with respect to the channel width to channel length ratios thereof and being chained and mutually adjusted in a manner that, under a condition: ##EQU5## wherein V M is a fixed potential at one terminal of the resistor, V 1 and V 2 are potentials alternatingly applied to the other terminal of the resistor, U DS (t i ) is the drain source voltage of the ith transistor, the appertaining channel width-to-channel length ratio (Wi/Li) is defined as follows: ##EQU6## wherein K' is a constant dependent conventionally upon manufacturing conditions, β.sub. = K'·(W 1 /L 1 ) wherein (W 1 /L 1 ) is the ratio of a given channel width to a given channel length, and V T (t 1 ; V GS =0) is the threshold voltage for a given transistor in a first operating mode wherein the gate-source voltage is equal to zero.