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US4173734A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage dividing integrated circuit device

Assignee: Toshiba Corp
•
Filing: 1978-01-31
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Granted: 1979-11-06
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Expires: 1998-01-31
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Abstract

Abstract In a semiconductor substrate of a first conductivity type fixed at a predetermined potential are formed a plurality of resistive regions of a second conductivity type. The resistive regions are connected in series between first and second potential supply terminals, through equally divided potential taking-out electrodes formed on the substrate. The resistive regions are so formed as to be progressively decreased in length in the order that the potential difference between the resistive region and the substrate increases to cause the resistive regions to have the substantially equal resistance values.

Inventors

  • 👤 Masataka Hirasawa
  • 👤 Akira Hashimoto
  • 👤 Kenichi Nagao
  • 👤 Toshiaki Kobayashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 23:21
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/24; H10; H10D; H10D84/00; H10D84/201; H10D84/204; H10D84/209

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 112 words
A voltage dividing integrated circuit device for providing equally divided potentials between first and second potential supplying terminals comprising: a semiconductor substrate of a first conductivity type coupled with a predetermined potential; a plurality of resistive regions of a second conductivity type formed in said semiconductor substrate which are connected in series between said first and second potential supplying terminals, and at least one equally divided potential taking-out electrode connected between respective resistive regions, wherein the lengths of said resistive regions are made progressively shorter in the increasing order of the potential difference between each respective resistive region and said substrate thereby to ensure substantially equal resistive values of said resistive regions.
Claim 2
Dependent Claim 112 words
A voltage dividing integrated circuit device for providing equally divided potentials between first and second potential supplying terminals comprising: a semiconductor substrate of a first conductivity type coupled with a predetermined potential; a plurality of resistive regions of a second conductivity type formed in said semiconductor substrate which are connected in series between said first and second potential supplying terminals, and at least one equally divided potential taking-out electrode connected between respective resistive regions, wherein the lengths of said resistive regions are made progressively shorter in the increasing order of the potential difference between each respective resistive region and said substrate thereby to ensure substantially equal resistive values of said resistive regions.
Claim 3
Dependent Claim 53 words
A voltage dividing integrated circuit device according to claim 1, in which, when the number of said resistive regions is N (2, 3, 4 . . . ), the lengths of the N resistive regions are L, L-ΔL, L-2ΔL, . . . L-(N-1)ΔL, where ΔL is a constant depending on the length L.
Claim 4
Dependent Claim 23 words
A voltage dividing integrated circuit device according to claim 2, in which the ratio of ΔL to L ranges from 0.015 to 0.03.
Claim 5
Dependent Claim 23 words
A voltage dividing integrated circuit device according to claim 2, in which the ratio of ΔL to L ranges from 0.02 to 0.04.
Claim 6
Dependent Claim 19 words
A voltage dividing integrated circuit device according to claim 1, in which said resistive regions are ion implanted regions.
Claim 7
Dependent Claim 42 words
A voltage dividing integrated circuit device according to claim 1 wherein the polarity of an error voltage between the taken-out equally divided potential and an ideal potential is changed with change in the voltage between said first and second potential supply terminals.

References Cited (Backward Citations)

US3936676A Cited
US4016483A Cited
US4092662A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-11-05 1983-05-07 1983-11-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-11-05 1987-05-07 1987-11-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-11-05 1991-05-07 1991-11-06 $7700.00 Window Closed / Lapsed

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