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US4656633A Expired / Lapsed US ⏱️ 0.0 years remaining

Error concealment system

Assignee: Dolby Laboratories Licensing Corp
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Filing: 1985-03-15
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Granted: 1987-04-07
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Expires: 2005-03-15
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Abstract

Abstract The error concealment system of the invention is for use with a delta modulation or delta signal modulation decoder which decodes digital signals received through a transmission or storage medium from an encoder. The encoder groups the digital signals into a plurality of blocks of one bit words. The decoder also receives from the encoder information related to the number of 1's in each of the blocks of one bit words before transmission or storage. The system comprises means for deriving information on the number of 1's in each received block of words and for comparing such information to the information received from the encoder to determine the presence and polarity of any bit errors. The system further includes means for introducing into each received block determined to contain one or more errors at least one bit error of the opposite polarity from that determined to conceal at least some of the effects of the bit errors.

Inventors

  • 👤 Craig C. Todd

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 16:24
CPC Classifications
H; H04; H04B; H04B14/00; H04B14/02; H04B14/06; H04B14/062

Claims Analysis

Total Claims: 27
Claim 1
Independent Claim 193 words
An apparatus for concealing transmission or storage bit errors for use with a decoder which decodes digital signals received through a transmission or storage medium from an encoder system, wherein the digital signals have been grouped into a plurality of blocks of 1 bit words, and wherein the apparatus also receives through the medium information related to the number of 1's in each of the plurality of blocks of 1 bit words before transmission or storage of the blocks, said apparatus comprising: means for deriving information on the number of 1's in each received block of words and comparing such derived information to the information received from the encoder system related to the number of 1's in such block before transmission or storage, and for determining, from such comparison, the presence and polarity of any transmission or storage bit errors; and means for introducing into each block of words received from the encoder system determined to contain one or more bit errors at least one bit error of the opposite polarity from that determined by the deriving, comparing and determining means to conceal at least some of the effects of the bit errors.
Claim 2
Independent Claim 193 words
An apparatus for concealing transmission or storage bit errors for use with a decoder which decodes digital signals received through a transmission or storage medium from an encoder system, wherein the digital signals have been grouped into a plurality of blocks of 1 bit words, and wherein the apparatus also receives through the medium information related to the number of 1's in each of the plurality of blocks of 1 bit words before transmission or storage of the blocks, said apparatus comprising: means for deriving information on the number of 1's in each received block of words and comparing such derived information to the information received from the encoder system related to the number of 1's in such block before transmission or storage, and for determining, from such comparison, the presence and polarity of any transmission or storage bit errors; and means for introducing into each block of words received from the encoder system determined to contain one or more bit errors at least one bit error of the opposite polarity from that determined by the deriving, comparing and determining means to conceal at least some of the effects of the bit errors.
Claim 3
Dependent Claim 132 words
The apparatus of claim 1, wherein the encoder system performs modulo n summation of the words within each block and the resulting check number for each block is transmitted or stored with the words of the corresponding block to convey information related to the number of 1's in such block before transmission or storage, said check number being received at the decoder, n being a positive integer, and wherein the deriving, comparing and determining means derives information on the number of 1's in each of the received block of words by performing modulo n summation to arrive at a computed check number, compares the computed check number for the received block of words with the corresponding received check number, and determines the polarity of any transmission or storage errors from the comparison.
Claim 4
Dependent Claim 9 words
The apparatus of claim 2, wherein n is 3.
Claim 5
Dependent Claim 9 words
The apparatus of claim 2, wherein n is 4.
Claim 6
Dependent Claim 31 words
The apparatus of claim 4, wherein the value of each check number is 0, 1, 2 or 3 so that the check numbers transmitted are each a 2 bit digital number.
Claim 7
Dependent Claim 28 words
The apparatus of claim 1, wherein the duration of each block of words is less than a predetermined time period which is of the order of 200 microseconds.
Claim 8
Dependent Claim 83 words
The apparatus of claim 4, wherein the deriving, comparing and determining means determines that there is one transmission or storage error of positive polarity in a block when the computed check number for a block of words is greater than the received check number for such block by 1 or less than such number by 3, and wherein when a positive error is detected, the introducing means introduces an error of negative polarity in the block to conceal the transmission or storage error.
Claim 9
Dependent Claim 83 words
The apparatus of claim 4, wherein the deriving, comparing and determining means determines that there is one transmission or storage error of negative polarity in a block when the computed check number for a block of words is greater than the received check number for such block by 3 or less than such number by 1, and wherein when a negative error is detected, the introducing means introduces an error of positive polarity in the block to conceal the transmission or storage error.
Claim 10
Dependent Claim 67 words
The apparatus of claim 4, wherein the deriving, comparing and determining means determines that there are two transmission or storage errors of undetermined polarity in a block when the computed check number for a block of words and the received check number for such block differ by 2, and wherein when two errors of undetermined polarity are detected, the introducing means introduces no errors in the block.
Claim 11
Dependent Claim 77 words
The apparatus of claim 1, wherein the introducing means introduces the error, at or close to the center of the block of words, by converting a word containing a bit of value 1 to one containing a bit of value 0 when a positive transmission or storage error has been detected, or by converting a word containing a bit of value 0 to one containing a bit of value 1 when a negative error has been detected.
Claim 12
Dependent Claim 28 words
The apparatus of claim 1, wherein the duration of each block of words is less than a predetermined time period which is of the order of 200 microseconds.
Claim 13
Dependent Claim 15 words
The apparatus of claim 1, wherein the decoder decodes the signals received by delta modulation.
Claim 14
Dependent Claim 16 words
The apparatus of claim 1, wherein the decoder decodes the signals received by delta sigma modulation.
Claim 15
Independent Claim 184 words
A method for concealing transmission or storage bit errors in digital signals received by a decoder from an encoder system through a transmission or storage medium, wherein the digital signals have been grouped into a plurality of blocks of 1 bit words, and wherein the decoder also receives from the encoder system information related to the number of 1's in each of a plurality of blocks of 1 bit words before transmission or storage of each block, said method comprising: deriving information on the number of 1's in each received block of words, comparing such information to the information received from the encoder system related to the number of 1's in such block before transmission or storage, and determining, from such comparison, the presence and polarity of any transmission or storage bit errors; and introducing into each block of words received from the encoder system determined to contain one or more bit errors at least one bit error of the opposite polarity from that determined by the deriving, comparing and determining step to conceal at least some of the effects of the bit errors.
Claim 16
Independent Claim 184 words
A method for concealing transmission or storage bit errors in digital signals received by a decoder from an encoder system through a transmission or storage medium, wherein the digital signals have been grouped into a plurality of blocks of 1 bit words, and wherein the decoder also receives from the encoder system information related to the number of 1's in each of a plurality of blocks of 1 bit words before transmission or storage of each block, said method comprising: deriving information on the number of 1's in each received block of words, comparing such information to the information received from the encoder system related to the number of 1's in such block before transmission or storage, and determining, from such comparison, the presence and polarity of any transmission or storage bit errors; and introducing into each block of words received from the encoder system determined to contain one or more bit errors at least one bit error of the opposite polarity from that determined by the deriving, comparing and determining step to conceal at least some of the effects of the bit errors.
Claim 17
Dependent Claim 106 words
The method of claim 14, wherein the encoder system performs mudulo n summation of the words within each block to arrive at check numbers, and wherein the received information comprises check numbers received at the decoder, n being a positive integer, and wherein the deriving, comparing and determining step derives information on the number of 1's in each of the received block of words by performing modulo n summation thereon thereby deriving the computed check number, compares the computed check number for the received block of words with the corresponding received check number, and determines the polarity of any transmission or storage errors from the comparison.
Claim 18
Dependent Claim 85 words
The method of claim 15, wherein the deriving, comparing and determining step determines that there is one transmission or storage error of positive polarity in a block when the check number for a block of words resulting from such step is greater than the received check number for such block by 1 or less than the received check number for such block by n-1, and wherein the introducing step introduces an error of negative polarity in the block to conceal the transmission or storage error.
Claim 19
Dependent Claim 85 words
The method of claim 15, wherein the deriving, comparing and determining step determines that there is one transmission or storage error of negative polarity in a block when the check number for a block of words resulting from such step is greater than the received check number for such block by n-1 or less than the received check number for such block by 1, and wherein the introducing step introduces an error of positive polarity in the block to conceal the transmission or storage error.
Claim 20
Dependent Claim 9 words
The method of claim 15, wherein n is 3.
Claim 21
Dependent Claim 9 words
The method of claim 15, wherein n is 4.
Claim 22
Dependent Claim 30 words
The method claim 19, wherein the value of each check number is 0, 1, 2 or 3 so that the check numbers transmitted are each a 2 bit digital number.
Claim 23
Dependent Claim 83 words
The method of claim 19, wherein the deriving, comparing and determining step determines that there is one transmission or storage error of positive polarity in a block when the computed check number for a block of words is greater than the received check number for such block by 1 or less than such number by 3, and wherein when a positive error is detected, the introducing step introduces an error of negative polarity in the block to conceal the transmission or storage error.
Claim 24
Dependent Claim 83 words
The method of claim 19, wherein the deriving, comparing and determining step determines that there is one transmission or storage error of negative polarity in a block when the computed check number for a block of words is greater than the received check number for such block by 3 or less than such number by 1, and wherein when a negative error is detected, the introducing step introduces an error of positive polarity in the block to conceal the transmission or storage error.
Claim 25
Dependent Claim 67 words
The method of claim 19, wherein the deriving, comparing and determining step determines that there are two transmission or storage errors of undetermined polarity in a block when the computed check number for a block of words and the received check number for such block differ by 2, and wherein when two errors of undetermined polarity are detected, the introducing step introduces no errors in the block.
Claim 26
Dependent Claim 77 words
The method of claim 14, wherein the introducing step introduces the error, at or close to the center of the block of words, by converting a word containing a bit of value 1 to one containing a bit of value 0 when a positive transmission or storage error has been detected, or by converting a word containing a bit of value 0 to one containing a bit of value 1 when a negative error has been detected.
Claim 27
Dependent Claim 28 words
The method of claim 14, wherein the duration of each block of words is less than a predetermined time period which is of the order of 200 microseconds.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-04-06 1990-10-06 1991-04-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-04-06 1994-10-06 1995-04-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-04-06 1998-10-06 1999-04-07 $7700.00 Window Closed / Lapsed

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