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US4656493A
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Bidirectional, high-speed power MOSFET devices with deep level recombination centers in base region
Assignee: General Electric Co
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Filing: 1985-02-05
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Granted: 1987-04-07
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Expires: 2005-02-05
Abstract
Abstract Power MOSFET devices useful in synchronous rectifier circuit applications are bidirectional and symmetrical for use in AC circuits, and have low on-resistance, fast switching speed, and high voltage capability. In one embodiment, a planar enhancement-mode diffused MOSFET structure obviates the source-to-base short conventionally included to prevent turn-on of the parasitic bipolar transistor defined by the main terminal regions of one conductivity type and the intermediate base region of opposite conductivity type, by employing within the base region a recombination region having a relatively small lifetime for excess base region majority-carriers in order to inhibit operation of the parasitic bipolar transistor. Another embodiment resembles a pair of conventional, vertical-current, MOSFET unit cells formed symmetrically back-to-back and sharing a common drain region which serves only as an intermediate terminal region not directly connected to any device terminal. To inhibit operation of the several parasitic bipolar transistors and thyristor switching device structures inherent in this embodiment, an ohmic short is provided between the source and base regions of each of the unit cells, and a recombination region having a relatively small lifetime for intermediate terminal region majority-carriers is formed within the intermediate terminal region between the spaced base regions of the unit cells.
Inventors
- 👤 Michael S. Adler
- 👤 Peter V. Gray
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:28
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/65; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/393; H10D62/50; H10D62/53; H10D62/80; H10D62/83; H10D62/834
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
243 words
A symmetrical bidirectional power MOSFET device comprising: a semiconductor substrate including a base region of one conductivity type and having a principal surface; a pair of spaced main terminal regions, each of opposite conductivity type, formed to approximately the same depth within said base region and being of lesser lateral extend and depth than said base region, said main terminal regions having peripheries terminating at said principal surface such that, at said principal surface, and under influence of an electric field, a portion of said base region exists as a band of opposite conductivity type extending between said main terminal regions; a pair of main terminal electrodes in ohmic contact with said main terminal regions, respectively; a gate insulating layer disposed on said principal surface over said band of said base region; a conductive gate electrode disposed on said gate insulating layer at least laterally over said band of said base region; and a recombination region included within said base region between said main terminal regions and extending to a depth of at least approximately the depth of said main terminal regions, said recombination region including deep level impurities for providing a relatively small lifetime for base region majority-carriers to avoid excess majority-carrier concentrations in said recombination region such that operation of said main terminal regions and said base region as a parasitic bipolar transistor is inhibited and such that, upon turnoff of said power MOSFET, excess base region majority-carriers are quickly recombined.
Claim 2
Dependent Claim
243 words
A symmetrical bidirectional power MOSFET device comprising: a semiconductor substrate including a base region of one conductivity type and having a principal surface; a pair of spaced main terminal regions, each of opposite conductivity type, formed to approximately the same depth within said base region and being of lesser lateral extend and depth than said base region, said main terminal regions having peripheries terminating at said principal surface such that, at said principal surface, and under influence of an electric field, a portion of said base region exists as a band of opposite conductivity type extending between said main terminal regions; a pair of main terminal electrodes in ohmic contact with said main terminal regions, respectively; a gate insulating layer disposed on said principal surface over said band of said base region; a conductive gate electrode disposed on said gate insulating layer at least laterally over said band of said base region; and a recombination region included within said base region between said main terminal regions and extending to a depth of at least approximately the depth of said main terminal regions, said recombination region including deep level impurities for providing a relatively small lifetime for base region majority-carriers to avoid excess majority-carrier concentrations in said recombination region such that operation of said main terminal regions and said base region as a parasitic bipolar transistor is inhibited and such that, upon turnoff of said power MOSFET, excess base region majority-carriers are quickly recombined.
Claim 3
Dependent Claim
16 words
A power MOSFET device in accordance with claim 1, wherein said deep level impurities comprise gold.
Claim 4
Dependent Claim
16 words
A power MOSFET device in accordance with claim 1, wherein said deep level impurities comprise platinum.
Claim 5
Dependent Claim
317 words
A symmetrical bidirectional power MOSFET device comprising: a semiconductor subtrate including an intermediate terminal region of one conductivity type and having a principal surface; a pair of spaced base regions, each of opposite conductivity type, formed within and of lesser lateral extent and depth than said intermediate terminal region, said base regions having peripheries terminating at said principal surface; a pair of main terminal regions of the one conductivity type, formed respectively within each of said base regions, each of said main terminal regions having a periphery terminating at said principal surface within and spaced from the periphery of the corresponding base region, respectively, such that, at said principal surface, and under influence of an electric field, a portion of each of said base regions exists as a band of the one conductivity type between the corresponding main terminal region, respectively, and the intermediate terminal region; a pair of ohmic shorts respectively formed between each of said pair of main terminal regions and the corresponding base region, respectively, such that operation of said corresponding base region, together with its associated pair of main terminal regions, respectively, and said intermediate terminal region as a parasitic bipolar transistor is inhibited; a gate insulating layer disposed on said principal surface over each band of said base regions; a conductive gate electrode disposed on each of said gate insulating layers at least laterally over each band of said base regions; and a recombination region included within said intermediate terminal region between and adjacent said spaced base regions, said recombination region including deep level impurities for providing a relatively small lifetime for intermediate terminal region majority-carriers to avoid excess majority-carrier concentrations in said recombination region such that operation of said spaced base regions and said intermediate terminal region as a parasitic bipolar transistor is inhibited and such that, upon turnoff of said power MOSFET, excess intermediate terminal region majority-carriers are quickly recombined.
Claim 6
Dependent Claim
317 words
A symmetrical bidirectional power MOSFET device comprising: a semiconductor subtrate including an intermediate terminal region of one conductivity type and having a principal surface; a pair of spaced base regions, each of opposite conductivity type, formed within and of lesser lateral extent and depth than said intermediate terminal region, said base regions having peripheries terminating at said principal surface; a pair of main terminal regions of the one conductivity type, formed respectively within each of said base regions, each of said main terminal regions having a periphery terminating at said principal surface within and spaced from the periphery of the corresponding base region, respectively, such that, at said principal surface, and under influence of an electric field, a portion of each of said base regions exists as a band of the one conductivity type between the corresponding main terminal region, respectively, and the intermediate terminal region; a pair of ohmic shorts respectively formed between each of said pair of main terminal regions and the corresponding base region, respectively, such that operation of said corresponding base region, together with its associated pair of main terminal regions, respectively, and said intermediate terminal region as a parasitic bipolar transistor is inhibited; a gate insulating layer disposed on said principal surface over each band of said base regions; a conductive gate electrode disposed on each of said gate insulating layers at least laterally over each band of said base regions; and a recombination region included within said intermediate terminal region between and adjacent said spaced base regions, said recombination region including deep level impurities for providing a relatively small lifetime for intermediate terminal region majority-carriers to avoid excess majority-carrier concentrations in said recombination region such that operation of said spaced base regions and said intermediate terminal region as a parasitic bipolar transistor is inhibited and such that, upon turnoff of said power MOSFET, excess intermediate terminal region majority-carriers are quickly recombined.
Claim 7
Dependent Claim
38 words
A power MOSFET device in accordance with claim 4, wherein, at each of said base regions, said recombination region extends from said principal surface to a depth of at least approximately the depth of the adjacent base region.
Claim 8
Dependent Claim
24 words
A power MOSFET device in accordance with claim 5, wherein said deep level impurities comprise one of the group consisting of gold and platinum.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-04-06 | 1990-10-06 | 1991-04-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-04-06 | 1994-10-06 | 1995-04-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-04-06 | 1998-10-06 | 1999-04-07 | $7700.00 | Window Closed / Lapsed |