US4654680A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sidewall gate IGFET
Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 1981-09-23
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Granted: 1987-03-31
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Expires: 2001-09-23
Abstract
Abstract A semiconductor device which is provided with a surface channel type or bulk channel type MIS FET. The MIS FET comprises at least a semiconductor substrate of a first conductivity type, a layer member formed in a predetermined pattern on the major surface of the substrate and having an insulating side surface; an insulating layer formed on the major surface of the substrate to extend from the insulating side surface in a direction opposite from the layer member; a conductive layer formed on the major surface of the insulating layer in contact with the insulating side surface of the layer member; and a first semiconductor region of a second conductivity type formed in the semiconductor substrate having a marginal edge corresponding to that of the conductive layer. The first semiconductor region serves as either one of source and drain regions; that region of the semiconductor substrate underlying the conductive layer serves as a channel forming region; that region of the conductive layer facing the channel forming region serves as a gate electrode; and that region of the insulating layer underlying the gate electrode serves as a gate insulating layer. The MIS FET can easily be combined with another MIS FET, a resistance element or capacitance element which is formed through utilization of the layer member of the former.
Inventors
- 👤 Shunpei Yamazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 03:53
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0221; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/05; H10D1/00; H10D1/40; H10D1/47; H10D1/60; H10D1/68; H10D30/60; H10D64/00; H10D64/01; H10D64/011; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01326; H10D64/0133; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0147; H10D84/02; H10D84/03; H10D84/038; Y; Y10; Y10S; Y10S148/00; Y10S148/111; Y10S148/141; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
304 words
A semiconductor device comprising: a semiconductor substrate of a first conducitvity type; a layer member formed in a predetermined pattern on the major surface of the semiconductor substrate and having a first insulating side surface; a first insulating layer formed on the major surface of the semiconductor substrate extending from the first insulating side surface of the layer member; a first conductive layer formed on the surface of the first insulating layer in contact with the first insulating layer and the first insulating side surface of the layer member, said first conductive layer having a marginal edge extending upwardly from said first insulating layer and said first conductive layer having a length which extends substantially parallel to said first insulating side surface and a width which extends in a direction substantially perpendicular to said insulating side surface, said width extending only from said marginal edge to said first insulating side surface; a first semiconductor region of a second conductivity type reverse from the first conductivity type, formed in the semiconductor substrate from the side of its major surface and having a marginal edge extending downwardly from the major surface such that the latter marginal edge is substantially aligned with the marginal edge of the first conductive layer, the first semiconductor region extending from its marginal edge away from the first conductive layer; wherein a first insulated gate field effect transistor is consitituted using that region of the first conductive layer overlying the semiconductor substrate as its gate electrode, that region of the first insulating layer underlying the gate electrode as its gate insulating layer, and the first semiconductor region as either one of its source and drain regions; and wherein said layer member includes an electrically conductive portion providing a series current path to or from the other of said source and drain regions.
Claim 2
Dependent Claim
304 words
A semiconductor device comprising: a semiconductor substrate of a first conducitvity type; a layer member formed in a predetermined pattern on the major surface of the semiconductor substrate and having a first insulating side surface; a first insulating layer formed on the major surface of the semiconductor substrate extending from the first insulating side surface of the layer member; a first conductive layer formed on the surface of the first insulating layer in contact with the first insulating layer and the first insulating side surface of the layer member, said first conductive layer having a marginal edge extending upwardly from said first insulating layer and said first conductive layer having a length which extends substantially parallel to said first insulating side surface and a width which extends in a direction substantially perpendicular to said insulating side surface, said width extending only from said marginal edge to said first insulating side surface; a first semiconductor region of a second conductivity type reverse from the first conductivity type, formed in the semiconductor substrate from the side of its major surface and having a marginal edge extending downwardly from the major surface such that the latter marginal edge is substantially aligned with the marginal edge of the first conductive layer, the first semiconductor region extending from its marginal edge away from the first conductive layer; wherein a first insulated gate field effect transistor is consitituted using that region of the first conductive layer overlying the semiconductor substrate as its gate electrode, that region of the first insulating layer underlying the gate electrode as its gate insulating layer, and the first semiconductor region as either one of its source and drain regions; and wherein said layer member includes an electrically conductive portion providing a series current path to or from the other of said source and drain regions.
Claim 3
Dependent Claim
197 words
A semiconductor device according to claim 1 wherein the electrically conductive portion of the layer member includes a second conductive layer formed on the major surface of the semiconductor substrate and a first resistance layer formed on the second conductive layer and said device includes a second insulating layer formed on the first side surfaces of the second conductive layer and the first resistance layer, the surface of the second insulating layer forming the first insulating side surface of the layer member; and which further comprises a second semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the second conductive layer in contact therewith, the second semiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, and the first resistance layer constituting a first resistance element coupled with the other of the source and drain regions of the first insulated field effect transistor, and the first resistance layer constituting a first resistance element coupled with the other of the source and drain regions of the first insulated gate field effect transistor through the second conductive layer.
Claim 4
Dependent Claim
146 words
A semiconductor device according to claim 1 wherein the electrically conductive portion of the layer member includes a second conductive layer formed on the major surface of the semiconductor substrate and said device includes a second insulating layer formed on a first side surface of the second conductive layer, the surface of the second insulating layer forming the first insulating side surface of the layer member; and which further comprises a second semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the second conductive layer in contact therewith, the second semiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, and second conductive layer constituting a lead coupled with the other of the source and drain regions of the first insulated gate field effect transistor.
Claim 5
Dependent Claim
149 words
A semiconductor device according to claim 1 wherein the electrically conductive portion of the layer member includes a first resistance layer formed on the major surface of the semiconductor substrate and said device includes a second insulating layer formed on a first side surface of the first resistance layer, the surface of the second insulating layer forming the first insulating side surface of the layer member; and which further comprises a second semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the first resistance layer in contact therewith; the second semiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, and the first resistance layer constituting a first resistance element coupled with the other of the source and drain regions of the first insulated gate field effect transistor.
Claim 6
Dependent Claim
247 words
A semiconductor device according to claim 1 wherein the layer member has a second insulating side surface, and which further comprises a third insulating layer formed on the major surface of the semiconductor substrate extending from the second insulating side surface of the layer member; a third conductive layer formed on the surface of the third insulating layer in contact with the third insulating layer and the second insulating side surface of the layer member, said third conductive layer having a marginal edge extending upwardly from said third insulating layer and said third conductive layer having a length which extends substantially parallel to said second insulating side surface and a width which extends in a direction substantially perpendicular to said second insulating side surface; and a third semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface and having a marginal edge extending downwardly from the major surface such that the latter original edge is substantially aligned with the marginal edge of the third conductive layer, the third semiconductor region extending from its marginal edge away from the third conductive layer; and wherein a second insulated gate field effect transistor is constituted using that region of the third conductive layer overlying the semiconductor substrate as its gate electrode, that region of the third insulating layer underlying the gate electrode as its gate insulating layer, and the third semiconductor region as either one of its source and drain regions.
Claim 7
Dependent Claim
154 words
A semiconductor device according to claim 5 wherein the electrically conductive portion of the layer member includes a fourth conductive layer formed on the major surface of the semiconductor substrate and said device includes a fourth insulating layer formed on first and second side surfaces of the fourth conductive layer, the surface of the fourth insulating layer forming the first and second insulating side surfaces of the layer member; and which further comprises a fourth semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the fourth conductive layer in contact therewith, the fourth semiconductor region serving as the other of the source and drain regions of the first and second insulated field effect transistors, and the fourth conductive layer constituting a lead coupled with the other of the source and drain regions of the first and second insulated gate field effect transistors.
Claim 8
Dependent Claim
97 words
A semiconductor device according to claim 5 wherein the electrically conductive portion of the layer member includes a fifth semiconductor layer of the second conductivity type formed on the major source of the semiconductor substrate and said device includes a fourth insulating layer formed on first and second surfaces of the fifth semiconductive layer, the fifth semiconductor region serving as the other of the source and drain regions of the first and second insulated field effect transistors, and the surface of the fourth insulating layer forming the first and second insulating side surfaces of the layer member.
Claim 9
Dependent Claim
154 words
A semiconductor device according to claim 5 wherein the electrically conductive portion of the layer member includes a second resistance layer formed on the major surface of the semiconductor substrate and said device includes a fourth insulating layer formed on first and second side surfaces of the second resistance layer, the surface of the fourth insulating layer forming the first insulating side surface of the layer member; and which further comprises a fourth semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the second resistance layer in contact therewith, the fourth semiconductor region serving as the other of the source and drain regions of the first and second insulated field effect transistors, and the second resistance layer constituting a second resistance element coupled with the other of the source and drain regions of the first and second insulated gate field effect transistors.
Claim 10
Dependent Claim
133 words
A semiconductor device according to claim 5 wherein the electrically conductive portion of the layer member includes a fifth semiconductor layer formed on the major surface of the semiconductor substrate and a second resistance layer formed on the fifth semiconductor layer and a fourth layer formed on first and second surfaces of the fifth semiconductor layer and the second resistance layer, the fifth semiconductor region serving as the other of the source and drain regions of the first and second insulated field effect transistors, and the second resistance lyer consituting a second resistance element coupled with the other of the source and drain regions of the first and second insulated gage field effect transistors, the surface of the fourth insulating layer forming the first and second insulating side surfaces of the layer member.
Claim 11
Dependent Claim
175 words
A semiconductor device according to claim 5 wherein the electrically conductive portion of the layer member includes a fifth conductive layer formed on the major surface of the semiconductor substrate and a second resistance layer formed on the fifth conductive layer and said device includes a fourth insulating layer formed on first and second side surfaces of the fifth conductive layer and the second resistance layer, the surface of the fifth insulating layer forming the first insulating side surface of the layer member; and which further comprises a fourth semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the fifth conductive layer in contact therewith, the fourth semiconductor region serving as the other of the source and drain regions of the first and second insulated field effect transistors, and the second resistance layer constituting a second resistance element coupled with the other of the source and drain regions of the first and second insulated gate field effect transistors through the fifth conductive layer.
Claim 12
Dependent Claim
183 words
A semiconductor device according to claim 1 having a fifth insulating layer formed on a first side of a sixth conductive layer and wherein the electircially conductive portion of the layer member includes said sixth conductive layer formed on the major surface of the semiconductor substrate and a sixth insulating layer formed on the sixth conductive layer and said device includes a seventh conductive layer formed on the sixth insulating layer, the surface of the fifth insulating layer forming the first insulating side surface of the layer member; and which further comprises a sixth semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the sixth conductive layer in contact therewith, the sixth semiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, and wherein a capacitance element is constituted including the sixth conductive layer, the sixth insulating layer and the seventh conductive layer and coupled with the other of the source and drain regions of the first insulated gate field effect transistor.
Claim 13
Dependent Claim
215 words
A semiconductor device according to claim 1 having a fifth insulating layer formed on a first side of a sixth conductive layer and a third resistance layer wherein the electrically conduction portion of the layer member includes said sixth conductive layer formed on the major surface of the semiconductor substrate, said third resistance layer formed on the sixth conductive layer and a sixth insulating layer formed on the third resistance layer and said device includes a seventh conductive layer formed on the sixth insulating layer, the surface of the fifth insulating layer forming the first insulating side surface of the layer member; and which further comprises a sixth semiconductor region of the second conductivity type formed in the semiconductor substrate from the side of its major surface to underlie the sixth conductive layer in contact therewith, the sixth semiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, and wherein a capacitance element is constituted including the sixth conductive layer, the third resistance layer, the sixth insulating layer and seventh conductive layer and coupled with the other of the source and drain regions of the first insulated gate field effect transistor, and the third resistance layer constituting a third resistance element coupled with the capacitance element.
Claim 14
Dependent Claim
93 words
A semiconductor device according to claim 1 wherein the electrically conductive portion of the layer member includes a seventh semiconductor layer of the second conductivity type formed on a the major surface of the semiconductor substrate and said device includes a seventh insulating layer formed on a first side surface of the seventh semiconductor layer, the seventh semiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, and the surface of the seventh insulating layer forming the first insulating surface of the layer member.
Claim 15
Dependent Claim
135 words
A semiconductor device according to claim 1 wherein the electrically conductive portion of the layer member includes a seventh semiconductor layer of the second conductivity type formed on the major surface of the semiconductor substrate and a fourth resistance layer formed on the seventh semiconductor layer and said device includes a seventh insulating layer formed on a first side surfaces of the seventh semiconductor layer and the fourth resistance layer, the seventh seimiconductor region serving as the other of the source and drain regions of the first insulated field effect transistor, the surface of the seventh insulating layer forming the first insulating side surface of the layer member, and the fourth resistance layer constituting a fourth resistance element coupled with the other of the source and drain regions of the first insulated field effect transistor.
Claim 16
Dependent Claim
16 words
A semiconductor device as in claim 1 where said electrically conductive portion includes a resistance element.
Claim 17
Dependent Claim
29 words
A semiconductor device as in claim 1 where said electrically conductive portion includes the other of said source and drain regions of the first insulated gate field effect transistor.
Claim 18
Dependent Claim
21 words
A semiconductor device as in claim 16 where said electically conductive portion includes a resistance element in circuit with said transistor.
Claim 19
Dependent Claim
21 words
A semiconductor device as in claim 1 where said electrically conductive portion includes at least a portion of a capacitive element.
Claim 20
Dependent Claim
24 words
A semiconductor device as in claim 18 where said portion of said capacitive element includes at least one conductive element of the capacitive element.
Claim 21
Dependent Claim
26 words
A semiconductor device as in claim 19 where said portion of said capacitive element further includes an insulating layer in contact with said one conductive element.
Claim 22
Dependent Claim
22 words
A semiconductor device as in claim 20 where said electrically conductive portion incudes a resistance element in circuit with said capacitive element.
Claim 23
Dependent Claim
49 words
A semiconductor device as in claim 1, where a further semiconductor region formed in the semiconductor substrate from the side of its major surface at least beneath said first insulating layer serves as a channel forming region to effect at least one bulk channel insulated gate field effect transistor.
Claim 24
Dependent Claim
46 words
A semiconductor device as in claim 22, where said electrically conductive portion includes a further semiconductor layer disposed on said major surface of the substrate, said further semiconductor layer constituting the other of said source and drain regions of the first insulated gate field effect transistor.
Claim 25
Dependent Claim
42 words
A semiconductor device as in claim 23, where said further semiconductor layer further constitutes one element of a capacitor, the remaining elements comprising an insulating layer disposed on said further semiconductor layer and a further conductive layer disposed on said insulating layer.
Claim 26
Dependent Claim
23 words
A semiconductor device as in claim 23, where said electrically conductive portion further includes a resistive layer disposed on said further semiconductor layer.
Claim 27
Dependent Claim
39 words
A semiconductor device as in claim 25, where said resistive layer constitutes one element of a capacitor, the remaining elements comprising an insulating layer disposed on said resistive layer and a further conductive layer disposed on said insulating layer.
Claim 28
Dependent Claim
25 words
A semiconductor device as in claim 22, where said electrically conductive portion includes a further conductive layer disposed on said major surface of the substrate.
Claim 29
Dependent Claim
23 words
A semiconductor device as in claim 27, where said electrically conductive portion further includes a resistive layer disposed on said further conductive layer.
Claim 30
Dependent Claim
39 words
A semiconductor device as in claim 27, where said resistive layer constitutes one element of a capacitor, the remaining elements comprising an insulating layer disposed on said resistive layer and a further conductive layer disposed on said insulating layer.
Claim 31
Dependent Claim
24 words
A semiconductor device as in claim 22, where said electrically conductive portion includes a resistive layer disposed on said major surface of the substrate.
Claim 32
Dependent Claim
39 words
A semiconductor device as in claim 30, where said resistive layer constitutes one element of a capacitor, the remaining elements comprising an insulating layer disposed on said resistive layer and a further conductive layer disposed on said insulating layer.
Claim 33
Dependent Claim
58 words
A semiconductor device as in claims 6, 7, 8, 9, or 10 where at least one further semiconductor region is disposed in the semiconductor substrate for the side of its major surface at least beneath said first and third insulating layers such that said first and second insulated gate field effect transistors are of the bulk channel type.
Claim 34
Dependent Claim
144 words
A semiconductor device according to claim 1 having a fifth insulating layer formed on first side of a semiconducting layer and wherein the electrically conductive portion of the layer member includes said semiconducting layer formed on the major surface of the semiconductor substrate, and a sixth insulating layer formed on the semiconducting layer and said device includes a seventh conductive layer formed on the sixth insulating layer, the surface of the fifth insulating layer forming the first insulating side surface of the layer member; and which the semiconductor layer serves as the other of the source and drain regions of the first insulated field effect transistor, and wherein a capacitance element is constituted including the semiconductor layer, the sixth insulating layer and the seventh conductive layer and coupled with the other of the source drain regions of the first insulated gate field effect transistor.
Claim 35
Dependent Claim
178 words
A semiconductor device according to claim 1 having a fifth insulating layer formed on a first side of a semiconductor layer and a third resistance layer wherein the electrically conductive portion of the layer member includes said semiconductor layer formed on the major surface of the semiconductor substrate, said third resistance layer formed on the semiconductor layer and a sixth insulating layer formed on the third resistance layer and said device includes a seventh conductive layer formed on the sixth insulating layer, the surface of the fifth insulating layer forming the first insulating side surface of the layer member; and which the semiconductor layer serves as the other of the source and drain regions of the first insulated field effect transistor, and wherein a capacitance element is constituted including the semiconductor layer, the third resistance layer, the sixth insulating layer and seventh conductive layer and coupled with the other of the source and drain regions of the first insulated gate field effect transistor, and the third resistance layer constituting a third resistance element coupled with the capacitance element.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-30 | 1990-09-29 | 1991-03-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-30 | 1994-09-29 | 1995-03-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-30 | 1998-09-29 | 1999-03-31 | $7700.00 | Window Closed / Lapsed |