Read only semiconductor memory device with polysilicon drain extensions

Claim 1

A semiconductor memory device in which data is written by ion implanting in a gate region of a memory cell transistor to vary the threshold voltage, comprising: a semiconductor body; a MOS transistor, having a gate region, source region, drain region and gate electrode formed in said semiconductor body; a field oxide film defining an element region of said semiconductor body; a first insulation layer formed on said MOS transistor and having a first contact hole in a prescribed position extending to the drain region of said MOS transistor; a polycrystalline silicon layer, formed over said MOS transistor except over at least a portion of the gate region of said MOS transistor, extending over said field oxide film, and filling the first contact hole, and directly contacting the drain region of said MOS transistor; a second insulation layer formed covering at least said polycrystalline silicon layer and having a second contact hole in a prescribed position on said polycrystalline silicon layer, said second contact hole formed on a portion of said polycrystalline silicon layer over said field oxide film; and a metal wire layer formed over said MOS transistor except over at least a part of said gate of said MOS transistor, and connected to said polycrystalline silicon layer via said second contact hole to transmit output signals of said MOS transistor.