US4648029A
Expired / Lapsed
US
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Multiplexed interrupt/DMA request arbitration apparatus and method
Assignee: International Business Machines Corp
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Filing: 1984-08-27
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Granted: 1987-03-03
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Expires: 2004-08-27
Abstract
Abstract In an arbitration apparatus and technique, the request lines from a plurality of potential requestors serve both as interrupt and DMA bus request signal lines to an arbitration device. The arbitration device selects among contending requestors on a priority basis and generates a grant signal interpreted by the requesting devices either as an interrupt grant or a bus grant depending upon whether or not an interrupt acknowledge signal is received. This effectively multiplexes the grant request lines from a plurality of requestors to greatly reduce interconnection complexity and cost. A single interrupt grant/bus grant multi-wire signal cable connects from the arbitration device to the individual requestors. A grant will appear on a single line thereof connected to an individual requestor that has been granted either an interrupt or access to the bus. Interrupt requests from the requestors are ORed together and simultaneously presented to a central controlling microprocessor. The arbitration device determines which requestor will be granted access and, under control of the central control microprocessor, the arbitrator gates an interrupt grant or a DMA grant signal to the device selected by the arbitration mechanism. The dual usage of the grant and request lines by the arbitration device represents a multiplexing feature to further reduce interconnections.
Inventors
- 👤 Ronald J. Cooper
- 👤 Mario A. Marsico
- 👤 John C. Pescatore
- 👤 Paul D. Sullivan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:54
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/32; G06F13/34; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/1008; G06F11/1044; G06F11/22; G06F11/2205; G06F11/2221
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
269 words
A combined interrupt and bus access request arbitration means, comprising: an arbitration logic means for arbitrating among plural. contemporaneously presented interrupt, DMA or bus service requests from individual requesting units, said arbitration logic means selecting an individual unit to be serviced from among a plurality of units presenting said requests; a system controlling processor means connected to said arbitration logic means; said system controlling processor means receiving indications of the presence of service requests from said arbitration logic means and issuing an indication of a grant of a said service request thereto; an interrupt request line connected to all said units presenting said interrupt requests, to said arbitration logic means and to said system controlling processors; a request indicating means for indicating the presence of a service request from any service requesting unit, each said unit having a service request line connected to said arbitration logic means; said arbitration logic means further having a plurality of service grant lines connected thereto, said lines being individually connected to individual ones of said service requesting units; and a commonly connected data bus interconnecting said arbitration logic means and said system controlling processor; and said arbitration logic means being connected to said request indicating means and, responsive to indications of requests, selecting one of said service requesting units to be granted its request; and said arbitration logic means including means connected to said system controlling processor for receiving a signal indicating the grant of a service request thereby and responsive to said indication for gating a service grant on the said service grant line connected to the said selected service requesting unit.
Claim 2
Dependent Claim
269 words
A combined interrupt and bus access request arbitration means, comprising: an arbitration logic means for arbitrating among plural. contemporaneously presented interrupt, DMA or bus service requests from individual requesting units, said arbitration logic means selecting an individual unit to be serviced from among a plurality of units presenting said requests; a system controlling processor means connected to said arbitration logic means; said system controlling processor means receiving indications of the presence of service requests from said arbitration logic means and issuing an indication of a grant of a said service request thereto; an interrupt request line connected to all said units presenting said interrupt requests, to said arbitration logic means and to said system controlling processors; a request indicating means for indicating the presence of a service request from any service requesting unit, each said unit having a service request line connected to said arbitration logic means; said arbitration logic means further having a plurality of service grant lines connected thereto, said lines being individually connected to individual ones of said service requesting units; and a commonly connected data bus interconnecting said arbitration logic means and said system controlling processor; and said arbitration logic means being connected to said request indicating means and, responsive to indications of requests, selecting one of said service requesting units to be granted its request; and said arbitration logic means including means connected to said system controlling processor for receiving a signal indicating the grant of a service request thereby and responsive to said indication for gating a service grant on the said service grant line connected to the said selected service requesting unit.
Claim 3
Dependent Claim
101 words
Apparatus as described in claim 1, wherein: said arbitration means further comprises an interrupt vector generator means responsive to an interrupt request on said interrupt request line and to said selection of one of said service requesting units for generating an interrupt vector for said requestor; and means for placing said interrupt vector on said data bus connected to said system control processor for informing said system control processor as to the memory location in main memory of said processor at which instructions for handling the interrupt of the said service requesting unit to whom a grant has been directed. PG,46
Claim 4
Dependent Claim
41 words
Apparatus as described in Claim 1, further comprising: a requestor code generator means connected to said request indicating means for encoding a multibit indication representing an identification of the said service requesting unit which is to be granted its said request.
Claim 5
Dependent Claim
39 words
Apparatus as described in Claim 3, further comprising: a requestor code storage register means connected to said requestor code generator means for storing temporarily an indication of the most recent said requestor having received a grant to its request.
Claim 6
Dependent Claim
41 words
Apparatus as described in Claim 2, further comprising: a requestor code generator means connected to said request indicating means for encoding a multibit indication representing an identification of the said service requesting unit which is to be granted its said request.
Claim 7
Dependent Claim
39 words
Apparatus as described in claim 5, further comprising: a requestor code storage register means connected to said requestor code generator means for storing temporarily an indication of the most recent said requestor having received a grant to its request.
Claim 8
Independent Claim
155 words
A method of dual arbitration between and selective grant of access among a simultaneously presented plurality of interrupt and/or bus requests from requestors, comprising steps of: receiving simultaneous requests from requestors at an arbitrator; temporarily storing signals identifying each of the specific requestors; receiving at a processor all interrupt requests from said requestors; and receiving at said arbitrator signals from said processor indicating that a bus grant or an interrupt acknowledge is given by said processor; receiving at all said requestors all said interrupt acknowledge signals from said processor; and outputting from said arbitrator a single grant signal to the highest priority said requestor, said grant being utilized by said requestor as a bus grant whenever said requestor has presented a bus request but being utilized by said requestor as an interrupt grant from said processor when an interrupt acknowledgement has also been received at said requestor and said requestor has presented an interrupt request.
Claim 9
Independent Claim
155 words
A method of dual arbitration between and selective grant of access among a simultaneously presented plurality of interrupt and/or bus requests from requestors, comprising steps of: receiving simultaneous requests from requestors at an arbitrator; temporarily storing signals identifying each of the specific requestors; receiving at a processor all interrupt requests from said requestors; and receiving at said arbitrator signals from said processor indicating that a bus grant or an interrupt acknowledge is given by said processor; receiving at all said requestors all said interrupt acknowledge signals from said processor; and outputting from said arbitrator a single grant signal to the highest priority said requestor, said grant being utilized by said requestor as a bus grant whenever said requestor has presented a bus request but being utilized by said requestor as an interrupt grant from said processor when an interrupt acknowledgement has also been received at said requestor and said requestor has presented an interrupt request.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-02 | 1990-09-01 | 1991-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-02 | 1994-09-01 | 1995-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-02 | 1998-09-01 | 1999-03-03 | $7700.00 | Window Closed / Lapsed |