Patent US4647793A successfully refreshed from Google Patents.
US4647793A
Expired / Lapsed
US
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Driver circuit for generating output at two different levels
Assignee: Motorola Solutions Inc
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Filing: 1984-08-31
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Granted: 1987-03-03
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Expires: 2004-08-31
Abstract
Abstract The present invention in the preferred embodiment comprises a plurality of current mirror circuit stages connected together for amplifying a first input signal and generating an output signal. A shunt path circuit is connected to the first stage of the plurality of current mirror stages and when activated by a second input signal shunts a portion of the first input signal to ground, thus reducing the current flow into the plurality of current mirror stages. During normal operation, when the shunt path circuit is inactivated, the last stage of the plurality of current mirror stages functions as a switch and passes all of the amplified first input signal. However, during the low power consumption mode, when the shunt path circuit is activated, the last stage of the plurality of current mirror circuit stages functions as a current mirror circuit and passes current at a considerably reduced level.
Inventors
- 👤 Walter L. Davis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:20
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/165; G01R19/16566; G01R19/16576; H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0016; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
150 words
A driver circuit, comprising: first means, responsive to a first input signal, for generating an output signal at a first output level; second means, connected to said first means and responsive to a second input signal, for causing the output signal from said first means to be generated at a second output level; amplifier circuit means for applying said first input signal wherein said amplifier means comprises a plurality of current mirror circuits connected together with a known current gain; shunt patch circuit means, connected to said amplifier circuit means, for shunting a portion of said first input signal whereby said output signal is generated at said second output level; and output circuit means, for generating said output signal at said first output level in the absence of said second input signal and for generating said output signal at said second output level in response to said second input signal.
Claim 2
Dependent Claim
150 words
A driver circuit, comprising: first means, responsive to a first input signal, for generating an output signal at a first output level; second means, connected to said first means and responsive to a second input signal, for causing the output signal from said first means to be generated at a second output level; amplifier circuit means for applying said first input signal wherein said amplifier means comprises a plurality of current mirror circuits connected together with a known current gain; shunt patch circuit means, connected to said amplifier circuit means, for shunting a portion of said first input signal whereby said output signal is generated at said second output level; and output circuit means, for generating said output signal at said first output level in the absence of said second input signal and for generating said output signal at said second output level in response to said second input signal.
Claim 3
Dependent Claim
80 words
A driver circuit, according to claim 1, wherein said output circuit means further comprises; a current mirror circuit in which the ratio of the output current to the input current is a function of the absolute level of the input current such that at input current levels above a predetermined current level said current mirror circuit functions as a switch and at input current levels below said predetermined current level said current mirror circuit functions as a current mirror circuit.
Claim 4
Dependent Claim
199 words
A driver circuit, comprising: a plurality of current mirror circuit stages connected together for amplifying a first input signal by a known gain factor and generating an output signal; a shunt path circuit, connected to the first current mirror circuit stage and responsive to a second input signal, for shunting a portion of said first input signal whereby the current flowing into said first current mirror circuit stage is reduced below a predetermined current level; the last current mirro circuit stage operating such that the ratio of its output current to input current is a function of the absolute level of the input current thereto such that when the current flowing into said first current mirror circuit stage is equal to or exceeds said predetermined current level the last current mirror circuit stage functions as a switch whereby said output signal is generated at a first level, and wherein the current flowing into said first current mirror circuit stage is below said predetermined current level the last current mirror circuit stage functions as a current mirror circuit whereby said output signal is generated at a predetermined level controlled by the multiplication ratio of said last current mirror circuit stage.
Claim 5
Dependent Claim
199 words
A driver circuit, comprising: a plurality of current mirror circuit stages connected together for amplifying a first input signal by a known gain factor and generating an output signal; a shunt path circuit, connected to the first current mirror circuit stage and responsive to a second input signal, for shunting a portion of said first input signal whereby the current flowing into said first current mirror circuit stage is reduced below a predetermined current level; the last current mirro circuit stage operating such that the ratio of its output current to input current is a function of the absolute level of the input current thereto such that when the current flowing into said first current mirror circuit stage is equal to or exceeds said predetermined current level the last current mirror circuit stage functions as a switch whereby said output signal is generated at a first level, and wherein the current flowing into said first current mirror circuit stage is below said predetermined current level the last current mirror circuit stage functions as a current mirror circuit whereby said output signal is generated at a predetermined level controlled by the multiplication ratio of said last current mirror circuit stage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-02 | 1990-09-01 | 1991-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-02 | 1994-09-01 | 1995-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-02 | 1998-09-01 | 1999-03-03 | $7700.00 | Window Closed / Lapsed |