US3764931A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gain control circuit
Assignee: Sony Corp
•
Filing: 1972-10-16
•
Granted: 1973-10-09
•
Expires: 1992-10-16
Abstract
Abstract A gain control circuit having a pair of first and second NPNtype transistors whose emitters are grounded and whose collectors are connected with each other and through a constant current source to a DC source. A third NPN-type transistor has its collector connected to the DC source, its emitter connected to the bases of the first and second transistors through separate resistors and also grounded through a resistor connected in parallel with a capacitor, and its base connected to the collector of the first transistor. A PNP-type transistor has its emitter connected to the base of the first transistor and its collector grounded. An input signal is applied to the base of the first transistor and a control signal is applied to the base of the PNP-type transistor.
Inventors
- 👤 T Waku
- 👤 Y Ota
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 22:02
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/3052
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
131 words
A gain control circuit comprising a circuit ground, first and second transistors each having base, emitter and collector electrodes respectively, means for connecting the collector electrodes of the first and second transistors to each other, means for connecting the emitter electrodes of the first and second transistors to the circuit ground, means for applying an input signal between the base electrode of the first transistor and the circuit ground, a constant current source connected to the collector electrode of the first transistor, means for applying DC bias to the base electrodes of the first and second transistors, respectively, in direct response to changes in the DC voltage at the collector electrode of the first transistor, and by-pass means connected between the base electrode of the first transistor and the circuit ground.
Claim 2
Dependent Claim
131 words
A gain control circuit comprising a circuit ground, first and second transistors each having base, emitter and collector electrodes respectively, means for connecting the collector electrodes of the first and second transistors to each other, means for connecting the emitter electrodes of the first and second transistors to the circuit ground, means for applying an input signal between the base electrode of the first transistor and the circuit ground, a constant current source connected to the collector electrode of the first transistor, means for applying DC bias to the base electrodes of the first and second transistors, respectively, in direct response to changes in the DC voltage at the collector electrode of the first transistor, and by-pass means connected between the base electrode of the first transistor and the circuit ground.
Claim 3
Dependent Claim
26 words
A gain control circuit as recited in claim 1 wherein means are provided to derive an output signal from the collector electrode of the first transistor.
Claim 4
Dependent Claim
80 words
A gain control circuit as recited in claim 1 wherein the DC bias applying means includes a third transistor having base, emitter and collector electrodes, means for connecting the base electrode of the third transistor to the collector electrode of the first transistor, impedance means for connecting the emitter electrode of the third transistor to the circuit ground, and means for connecting the emitter electrode of the third transistor to the base electrodes of the first and second transistors, respectively.
Claim 5
Dependent Claim
36 words
A gain control circuit as recited in claim 1 wherein the by-pass means includes a variable impedance means to by-pass the input signal and the DC bias applied to the base electrode of the first transistor.
Claim 6
Dependent Claim
28 words
A gain control circuit as recited in claim 4 wherein the variable impedance means includes a fourth transistor which is opposite to the first transistor in conductivity type.
Claim 7
Dependent Claim
48 words
A gain control circuit as recited in claim 5 in which the fourth transistor is connected at its emitter electrode to the base electrode of the first transistor, its collector electrode is connected to the circuit ground, and its base electrode is supplied with an external control signal.
Claim 8
Dependent Claim
29 words
A gain control circuit as recited in claim 6 wherein means are provided for biasing the fourth transistor into its non-conductive state when no control signal is applied thereto.
References Cited (Backward Citations)
US3036275A
Cited
US3530308A
Cited
US3500222A
Cited
US3652791A
Cited
US3651420A
Cited
US3714598A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-10-08 | 1977-04-09 | 1977-10-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-10-08 | 1981-04-09 | 1981-10-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-10-08 | 1985-04-09 | 1985-10-09 | $7700.00 | Window Closed / Lapsed |