US4644190A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dynamic MOS circuit
Assignee: Siemens AG
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Filing: 1984-07-20
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Granted: 1987-02-17
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Expires: 2004-07-20
Abstract
Abstract A dynamic MOS-circuit comprising a bootstrap capacitor decoupled by an output transistor and wherein the bootstrap capacitor is discharged via a MOS-FET. The MOS-FET is connected as a constant current source. With the invention, a control voltage at an output MOS-FET is nearly double an operating voltage of the circuit.
Inventors
- 👤 Guenther Eberhard
- 👤 Joachim Krause
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 17:38
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/01; H03K19/017; H03K19/01707; H03K19/01714; H03K5/00; H03K5/01; H03K5/02; H03K5/023
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
292 words
A dynamic MOS circuit, comprising: an operating potential and a reference potential connected to operate the dynamic MOS circuit; an input terminal for the MOS circuit; a first enhancement type control MOS-FET having its gate connected to the input terminal, a first end of its channel connected to the reference potential, and a second end of its channel connecting to a first end of a channel of a discharge MOS-FET connected as a current source; said discharge MOS-FET having its gate connected to said first end of its channel and having a second end of its channel connecting to a first end of a channel of a depletion type first switching MOS-FET; said first switching MOS-FET having its gate directly connecting to said input terminal and a second end of its channel connecting to said operating potential; a second enhancement type control MOS-FET having a first end of its channel connecting to the reference potential, a second end of its channel connecting to an output terminal, and its gate connecting to said input terminal; a second enhancement type switching MOS-FET having a first end of its channel connecting to said output terminal, a second end of its channel connecting to said operating potential, and its gate connecting to the first end of the channel of the discharge MOS-FET; a boot strap capacitor having a first end connecting to the first end of the channel of the first switching MOS-FET and its second end connecting to the output terminal; and a capacitor connected between the gate of the first switching MOS-FET and the first end of the channel of the first switching MOS-FET, a capacitance of the capacitor being selected for a desired edge delay of an input signal at the input terminal.
Claim 2
Dependent Claim
292 words
A dynamic MOS circuit, comprising: an operating potential and a reference potential connected to operate the dynamic MOS circuit; an input terminal for the MOS circuit; a first enhancement type control MOS-FET having its gate connected to the input terminal, a first end of its channel connected to the reference potential, and a second end of its channel connecting to a first end of a channel of a discharge MOS-FET connected as a current source; said discharge MOS-FET having its gate connected to said first end of its channel and having a second end of its channel connecting to a first end of a channel of a depletion type first switching MOS-FET; said first switching MOS-FET having its gate directly connecting to said input terminal and a second end of its channel connecting to said operating potential; a second enhancement type control MOS-FET having a first end of its channel connecting to the reference potential, a second end of its channel connecting to an output terminal, and its gate connecting to said input terminal; a second enhancement type switching MOS-FET having a first end of its channel connecting to said output terminal, a second end of its channel connecting to said operating potential, and its gate connecting to the first end of the channel of the discharge MOS-FET; a boot strap capacitor having a first end connecting to the first end of the channel of the first switching MOS-FET and its second end connecting to the output terminal; and a capacitor connected between the gate of the first switching MOS-FET and the first end of the channel of the first switching MOS-FET, a capacitance of the capacitor being selected for a desired edge delay of an input signal at the input terminal.
Claim 3
Dependent Claim
340 words
A dynamic MOS circuit, comprising: an operating potential and a reference potential connected to operate the dynamic MOS circuit; an input terminal for the MOS circuit; a first enhancement type control MOS-FET having its gate connected to the input terminal, a first end of its channel connected to the reference potential, and a second end of its channel connecting to a first end of a channel of a discharge MOS-FET connected as a current source; said discharge MOS-FET having its gate connected to said first end of its channel and having a second end of its channel connecting to a first end of a channel of a depletion type first switching MOS-FET; said first switching MOS-FET having its gate connecting directly to said reference potential and a second end of its channel connecting to said operating potential; a second enhancement type control MOS-FET having a first end of its channel connecting to the reference potential, and its gate connecting to said input terminal; a second enhancement type switching MOS-FET having a first end of its channel connecting to a second end of the channel of the second control MOS-FET, a second end of its channel connecting to said operating potential, and its gate connecting to the first end of the channel of the discharge MOS-FET; a boot strap capacitor having a first end connecting to the first end of the channel of the first switching MOS-FET and its second end connecting to the second end of the channel of the second control MOS-FET; and a push-pull output stage formed of first and second enhancement type MOS-FETs, the first MOS-FET having a first end of its channel connecting to the reference potential, its gate connecting to the input terminal, and a second end of its channel connecting to an output terminal, and the second enhancement MOS-FET having a first end of its channel connecting to the output terminal, its gate connecting to a gate of the second switching MOS-FET, and a second end of its channel connecting to the operating potential.
Claim 4
Dependent Claim
340 words
A dynamic MOS circuit, comprising: an operating potential and a reference potential connected to operate the dynamic MOS circuit; an input terminal for the MOS circuit; a first enhancement type control MOS-FET having its gate connected to the input terminal, a first end of its channel connected to the reference potential, and a second end of its channel connecting to a first end of a channel of a discharge MOS-FET connected as a current source; said discharge MOS-FET having its gate connected to said first end of its channel and having a second end of its channel connecting to a first end of a channel of a depletion type first switching MOS-FET; said first switching MOS-FET having its gate connecting directly to said reference potential and a second end of its channel connecting to said operating potential; a second enhancement type control MOS-FET having a first end of its channel connecting to the reference potential, and its gate connecting to said input terminal; a second enhancement type switching MOS-FET having a first end of its channel connecting to a second end of the channel of the second control MOS-FET, a second end of its channel connecting to said operating potential, and its gate connecting to the first end of the channel of the discharge MOS-FET; a boot strap capacitor having a first end connecting to the first end of the channel of the first switching MOS-FET and its second end connecting to the second end of the channel of the second control MOS-FET; and a push-pull output stage formed of first and second enhancement type MOS-FETs, the first MOS-FET having a first end of its channel connecting to the reference potential, its gate connecting to the input terminal, and a second end of its channel connecting to an output terminal, and the second enhancement MOS-FET having a first end of its channel connecting to the output terminal, its gate connecting to a gate of the second switching MOS-FET, and a second end of its channel connecting to the operating potential.
Claim 5
Dependent Claim
434 words
A dynamic MOS circuit, comprising: an operating potential and a reference potential connected to operate the dynamic MOS circuit; an input terminal for the MOS circuit; a first enhancement type control MOS-FET having its gate connected to the input terminal, a first end of its channel connected to the reference potential, and a second end of its channel connecting to a first end of a channel of a discharge MOS-FET connected as a current source; said discharge MOS-FET having its gate connected to said first end of its channel and having a second end of its channel connecting to a first end of a channel of a depletion type first switching MOS-FET; said first switching MOS-FET having its gate directly connecting to said reference potential and a second end of its channel connecting to said operating potential; a second enhancement type control MOS-FET having a first end of its channel connecting to the reference potential, and its gate connecting to said input terminal; a second enhancement type switching MOS-FET having a first end of its channel connecting to a second end of the channel of the second MOS-FET, a second end of its channel connecting to said operating potential, and its gate connecting to the first end of the channel of the discharge MOS-FET; a boot strap capacitor having a first end connecting to the first end of the channel of the first switching MOS-FET and its second end connecting to the second end of the channel of the second MOS-FET; a driver stage formed of first and second enhancement type MOS-FETs, the first MOS-FET having a first end of its channel connecting to the reference potential, its gate connecting to the input terminal, and a second end of its channel connecting to a first end of a channel of the second MOS-FET, and the second enhancement MOS-FET having its gate connecting to a gate of the second switching MOS-FET, and a second end of its channel connecting to the first end of the channel of the first switching MOS-FET; and a push-pull output stage having first and second enhancement type MOS-FETs, the first MOS-FET having a first end of its channel connecting to the reference potential, its gate connecting to the input terminal, and a second end of its channel connecting to an output terminal, and the second enhancement MOS-FET having a first end of its channel connecting to the output terminal, its gate connecting to the first end of the channel of the second enhancement MOS-FET of the driver stage, and a second end of its channel connecting to the operating potential.
Claim 6
Dependent Claim
434 words
A dynamic MOS circuit, comprising: an operating potential and a reference potential connected to operate the dynamic MOS circuit; an input terminal for the MOS circuit; a first enhancement type control MOS-FET having its gate connected to the input terminal, a first end of its channel connected to the reference potential, and a second end of its channel connecting to a first end of a channel of a discharge MOS-FET connected as a current source; said discharge MOS-FET having its gate connected to said first end of its channel and having a second end of its channel connecting to a first end of a channel of a depletion type first switching MOS-FET; said first switching MOS-FET having its gate directly connecting to said reference potential and a second end of its channel connecting to said operating potential; a second enhancement type control MOS-FET having a first end of its channel connecting to the reference potential, and its gate connecting to said input terminal; a second enhancement type switching MOS-FET having a first end of its channel connecting to a second end of the channel of the second MOS-FET, a second end of its channel connecting to said operating potential, and its gate connecting to the first end of the channel of the discharge MOS-FET; a boot strap capacitor having a first end connecting to the first end of the channel of the first switching MOS-FET and its second end connecting to the second end of the channel of the second MOS-FET; a driver stage formed of first and second enhancement type MOS-FETs, the first MOS-FET having a first end of its channel connecting to the reference potential, its gate connecting to the input terminal, and a second end of its channel connecting to a first end of a channel of the second MOS-FET, and the second enhancement MOS-FET having its gate connecting to a gate of the second switching MOS-FET, and a second end of its channel connecting to the first end of the channel of the first switching MOS-FET; and a push-pull output stage having first and second enhancement type MOS-FETs, the first MOS-FET having a first end of its channel connecting to the reference potential, its gate connecting to the input terminal, and a second end of its channel connecting to an output terminal, and the second enhancement MOS-FET having a first end of its channel connecting to the output terminal, its gate connecting to the first end of the channel of the second enhancement MOS-FET of the driver stage, and a second end of its channel connecting to the operating potential.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-16 | 1990-08-18 | 1991-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-16 | 1994-08-18 | 1995-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-16 | 1998-08-18 | 1999-02-17 | $7700.00 | Window Closed / Lapsed |