US4639755A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Thermosensitive semiconductor device using Darlington circuit
Assignee: Seiko Instruments Inc
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Filing: 1982-08-31
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Granted: 1987-01-27
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Expires: 2002-08-31
Abstract
Abstract A thermosensitive semiconductor device has a semiconductor substrate of one conductivity type which is used as the common collector of at least two Darlington-connected transistors. The base of the first stage transistor is connected to the common collector to form a first terminal and the emitter of the final stage transistor forms a second terminal. A constant current source is connected between the first and second terminals. To reduce deviations in the temperature response, a second collector region can be used and which can extend to a depth deeper than the depth of the emitter of the final stage transistor to absorb some of the carriers injected by the emitter.
Inventors
- 👤 Masayuki Namiki
- 👤 Masaaki Kamiya
- 👤 Yoshikazu Kojima
- 👤 Kojiro Tanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 08:39
CPC Classifications
H; H10; H10N; H10N19/00; H10D; H10D48/00; H10D48/30; H10D84/00; H10D84/60; H10D84/641; H10D84/642; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D89/00; H10D89/10; H10D89/105
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
112 words
A thermosensitive semiconductor device comprising: transistors connected in a Darlington connection and formed on a semiconductor substrate of one conductivity type which constitutes a common collector acting as a first collector region of each of the transistors, the semiconductor substrate having formed thereon a base region and an emitter region of each of the transistors, the base region of the first stage transistor in the Darlington connection being connected to said common collector to constitute a first terminal of the device, the emitter region of the final stage transistor of the Darlington connection constituting a second terminal of the device, and a constant current source connected between the first and second terminals.
Claim 2
Dependent Claim
112 words
A thermosensitive semiconductor device comprising: transistors connected in a Darlington connection and formed on a semiconductor substrate of one conductivity type which constitutes a common collector acting as a first collector region of each of the transistors, the semiconductor substrate having formed thereon a base region and an emitter region of each of the transistors, the base region of the first stage transistor in the Darlington connection being connected to said common collector to constitute a first terminal of the device, the emitter region of the final stage transistor of the Darlington connection constituting a second terminal of the device, and a constant current source connected between the first and second terminals.
Claim 3
Dependent Claim
55 words
A device as claimed in claim 1; wherein at least one of said transistors has a secondary collector region in said semiconductor substrate which is spaced apart from and not electrically connected to said first collector region, the secondary collector region being connected to the base region of the transistor having the secondary collector region.
Claim 4
Dependent Claim
48 words
A device is claimed in claim 2; wherein the secondary collector region is deeper than the depth of a channel-cut region in said semiconductor substrate which is formed around the emitter region of the transistor having the secondary collector region and is also deeper than said emitter region.
Claim 5
Dependent Claim
136 words
A thermosensitive semiconductor device comprising: a semiconductor substrate of one conductivity type; at least two transistors connected in a Darlington configuration and formed on the semiconductor substrate which comprises a common collector acting as a first collector region of each transistor, each transistor having a base region and an emitter region formed on the semiconductor substrate; means connecting the base region of the first stage transistor of the Darlington configuration to the common collector to define a first terminal of the device; means connected to the emitter of the final stage transistor of the Darlington configuration to define a second terminal of the device; a constant current source connected between the first and second terminals; and means for taking out a temperature-sensitive voltage across the common collector and the emitter region of the final stage transistor.
Claim 6
Dependent Claim
136 words
A thermosensitive semiconductor device comprising: a semiconductor substrate of one conductivity type; at least two transistors connected in a Darlington configuration and formed on the semiconductor substrate which comprises a common collector acting as a first collector region of each transistor, each transistor having a base region and an emitter region formed on the semiconductor substrate; means connecting the base region of the first stage transistor of the Darlington configuration to the common collector to define a first terminal of the device; means connected to the emitter of the final stage transistor of the Darlington configuration to define a second terminal of the device; a constant current source connected between the first and second terminals; and means for taking out a temperature-sensitive voltage across the common collector and the emitter region of the final stage transistor.
Claim 7
Dependent Claim
52 words
A thermosensitive semiconductor device according to claim 4; wherein at least one of the transistors has a secondary collector region formed in the semiconductor substrate, the secondary collector region being electrically isolated from the first collector region of said one transistor and being connected to the base region of said one transistor.
Claim 8
Dependent Claim
56 words
A thermosensitive semiconductor device according to claim 5; wherein said one transistor has a channel-cut region formed in the semiconductor substrate around the emitter region of said one transistor, the secondary collector region being the deeper than the depth of the channel-cut region and deeper than the depth of the emitter region of said one transistor.
References Cited (Backward Citations)
US4078208A
Cited
US4328509A
Cited
US3867650A
Cited
US4065187A
Cited
FR2335055A1
Cited
US4142115A
Cited
US4136355A
Cited
US4346313A
Cited
JPS5419684A
Cited
US4287440A
Cited
JPS56135963A
Cited
US4329598A
Cited
JPS57145355A
Cited
GB2105109A
Cited
JPS5848963A
Cited
US4471236A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-26 | 1990-07-28 | 1991-01-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-26 | 1994-07-28 | 1995-01-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-26 | 1998-07-28 | 1999-01-27 | $7700.00 | Window Closed / Lapsed |