US4638466A
Expired / Lapsed
US
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Programmable semiconductor memory device having separate read word line drivers and write-only word line drivers
Assignee: Fujitsu Ltd
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Filing: 1984-12-31
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Granted: 1987-01-20
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Expires: 2004-12-31
Abstract
Abstract A programmable semiconductor memory device provided with a read word line driver and a write-only word line driver. The write-only word line driver is disconnected from the lines after a write operation. The read word line driver has read-driving output transistors, the emitter areas of which are smaller than the emitter areas of the write driving output transistor. Thus, the accessing speed for a read operation is improved.
Inventors
- 👤 Toshio Fukumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 17:34
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/18
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
153 words
A programmable semiconductor memory device comprising: a plurality of word lines; a plurality of bit lines intersecting said word lines; programmable memory cells arranged on respective intersecting portions between said word lines and said bit lines; a word line address decoder for selecting one of said word lines in response to an input address signal; a read word line driver for absorbing a current from the selected word line during a read operation of said programmable memory cells, based on the output signal from said word line address decoder; a write-only word line driver having a plurality of write-driving output transistors, each for absorbing a current from the selected word line during a write operation of said programmable memory cell, based on the output signal from said word line address decoder; and a cutting means for cutting, after completion of write operation, the connection between said write-driving output transistors and said word lines.
Claim 2
Dependent Claim
153 words
A programmable semiconductor memory device comprising: a plurality of word lines; a plurality of bit lines intersecting said word lines; programmable memory cells arranged on respective intersecting portions between said word lines and said bit lines; a word line address decoder for selecting one of said word lines in response to an input address signal; a read word line driver for absorbing a current from the selected word line during a read operation of said programmable memory cells, based on the output signal from said word line address decoder; a write-only word line driver having a plurality of write-driving output transistors, each for absorbing a current from the selected word line during a write operation of said programmable memory cell, based on the output signal from said word line address decoder; and a cutting means for cutting, after completion of write operation, the connection between said write-driving output transistors and said word lines.
Claim 3
Dependent Claim
48 words
A programmable semiconductor memory device as set forth in claim 1, wherein said read word line driver comprises a current absorption inhibiting means for inhibiting the absorption of current from said word lines to said read word line driver during a write operation of said programmable memory cells.
Claim 4
Dependent Claim
42 words
A programmable semiconductor memory device as set forth in claim 2, wherein said cutting means comprises a plurality of fuses respectively connected between said write-only word line driver and said word lines, said fuses being broken after a writing operation is completed.
Claim 5
Dependent Claim
29 words
A programmable semiconductor memory device as set forth in claim 3, wherein said read word line driver comprises read-driving output transistors having collectors respectively connected to said word lines.
Claim 6
Dependent Claim
32 words
A programmable semiconductor memory device as set forth in claim 4, wherein said write-only word line driver comprises write-driving output transistors having collectors respectively connected through said fuses to said word lines.
Claim 7
Dependent Claim
33 words
A programmable semiconductor memory device as set forth in claim 5, wherein the emitter area of each of said read-driving transistors is smaller than the emitter area of each of said write-driving transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-19 | 1990-07-21 | 1991-01-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-19 | 1994-07-21 | 1995-01-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-19 | 1998-07-21 | 1999-01-20 | $7700.00 | Window Closed / Lapsed |