Patent US4637039A successfully refreshed from Google Patents.
US4637039A
Expired / Lapsed
US
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Frequency divider circuit arrangement
Assignee: US Philips Corp
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Filing: 1985-02-07
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Granted: 1987-01-13
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Expires: 2005-02-07
Abstract
Abstract In order to reduce the likelihood of incorrect states being transferred from one cross-coupled transistor pair to the next in a frequency divider which comprises at least two such pairs (6a, 7a and 8a, 9a) which are energized alternately by means of a switchable current source arrangement (5) and which are inter-coupled to form a cyclic arrangement by means of data transfer transistors (6b, 7b, 8b and 9b) energized from the same outputs (22, 23) of the current source arrangement, the transistors employed are of the insulated gate field effect type. The channel width-to-length ratios of the pair transistors (6a, 7a, 8a, 9a) may be chosen to be different from the corresponding ratios for the data transfer transistors (6b, 7b, 8b, 9b) in order to improve either the high-frequency or the low frequency performance in accordance with the sign of such difference.
Inventors
- 👤 Cornelis M. Huizer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:23
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/58; H03K23/60; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356017; H03K3/356034; H02; H02J; H02J1/00
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
365 words
A frequency divider circuit arrangement comprising 2n subcircuits inter-coupled to form a cyclic arrangement, where n is a positive integer, and switchable current source means, each subcircuit comprising first, second, third and fourth transistor structures each having a control electrode, an output electrode and a common electrode, in each subcircuit the output electrode of the first structure being provided with a load impedance and being coupled to the control electrodes of the second and fourth structures, the output electrode of the second structure being provided with a load impedance and being coupled to the control electrodes of the first and third structures, and the common electrodes of all four structures being connected to a common point, the inter-couplings between said subcircuits comprising, for each of said subcircuits except one, a coupling from the output electrode of the third structure of the relevant subcircuit to the output electrode of the first structure of the next subcircuit in the cyclic arrangement and a coupling from the output electrode of the fourth structure of the relevant subcircuit to the output electrode of the second structure of the next subcircuit in the cyclic arrangement, and for the other one of said subcircuits a coupling from the output electrode of the fourth structure of the relevant subcircuit to the output electrode of the first structure of the next subcircuit in the cyclic arrangement and a coupling from the output electrode of the third structure of the relevant subcircuit to the output electrode of the second structure of the next subcircuit in the cyclic arrangement, said switchable current source means having first and second outputs and being constructed to supply current thereat alternately in response to the application of an input signal to said switchable current source means, the said common points of the successive said subcircuits in the cyclic arrangement being constituted by alternate ones of said first and second outputs and an output electrode of a said first structure being coupled to an output of said circuit arrangement, characterized in that each said transistor structure is an insulated gate field-effect transistor structure, said control, output and common electrodes being gate, drain and source electrodes respectively of the relevant structures.
Claim 2
Dependent Claim
365 words
A frequency divider circuit arrangement comprising 2n subcircuits inter-coupled to form a cyclic arrangement, where n is a positive integer, and switchable current source means, each subcircuit comprising first, second, third and fourth transistor structures each having a control electrode, an output electrode and a common electrode, in each subcircuit the output electrode of the first structure being provided with a load impedance and being coupled to the control electrodes of the second and fourth structures, the output electrode of the second structure being provided with a load impedance and being coupled to the control electrodes of the first and third structures, and the common electrodes of all four structures being connected to a common point, the inter-couplings between said subcircuits comprising, for each of said subcircuits except one, a coupling from the output electrode of the third structure of the relevant subcircuit to the output electrode of the first structure of the next subcircuit in the cyclic arrangement and a coupling from the output electrode of the fourth structure of the relevant subcircuit to the output electrode of the second structure of the next subcircuit in the cyclic arrangement, and for the other one of said subcircuits a coupling from the output electrode of the fourth structure of the relevant subcircuit to the output electrode of the first structure of the next subcircuit in the cyclic arrangement and a coupling from the output electrode of the third structure of the relevant subcircuit to the output electrode of the second structure of the next subcircuit in the cyclic arrangement, said switchable current source means having first and second outputs and being constructed to supply current thereat alternately in response to the application of an input signal to said switchable current source means, the said common points of the successive said subcircuits in the cyclic arrangement being constituted by alternate ones of said first and second outputs and an output electrode of a said first structure being coupled to an output of said circuit arrangement, characterized in that each said transistor structure is an insulated gate field-effect transistor structure, said control, output and common electrodes being gate, drain and source electrodes respectively of the relevant structures.
Claim 3
Dependent Claim
44 words
An arrangement as claimed in claim 1, characterized in that the width-to-length ratios of the channels of all the first and second transistor structures differ from the width-to-length ratios of the channels of all the third and fourth transistor structures in the same sense.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-12 | 1990-07-14 | 1991-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-12 | 1994-07-14 | 1995-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-12 | 1998-07-14 | 1999-01-13 | $7700.00 | Window Closed / Lapsed |