Patent US4636831A successfully refreshed from Google Patents.
US4636831A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Fujitsu Ltd
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Filing: 1983-07-26
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Granted: 1987-01-13
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Expires: 2003-07-26
Abstract
Abstract A semiconductor device including a plurality of resistors. All the resistors are contained in circuit block regions which are arranged successively in a first direction. Each of the resistors is extended in the first direction. All of the resistors are set up in the form of a plurality of stages arranged in a second direction perpendicular to the first direction and in parallel with each other.
Inventors
- 👤 Chikai Ono
- 👤 Yoshinori Okajima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:36
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/201; H10D84/204; H10D84/209
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
202 words
A semiconductor device comprising: a plurality of circuit block regions including memory cell array block regions and peripheral circuit block regions, said memory cell block regions and said peripheral circuit block regions respectively connected to form circuit block region pairs arranged successively in a first direction and having a width P measured in the first direction; and a plurality of resistors arranged between and connected to said memory cell array block regions and said peripheral block regions of said circuit block region pairs, each of said plurality of resistors extending in a substantially linear manner in said first direction along the width of said circuit block region pairs and having a contact window provided at each end, said plurality of resistors formed close together and parallel to each other, and set up in the form of n (n is an integer greater than or equal to two) stages arranged in a second direction perpendicular to said first direction, each of said plurality of resistors having a length L determined by a relationship (n-1)P<L<nP, said resistors on each of said stages being shifted from each other in said first direction by an amount rP (r is an integer in a range of 1≦r≦(n-1)).
Claim 2
Dependent Claim
202 words
A semiconductor device comprising: a plurality of circuit block regions including memory cell array block regions and peripheral circuit block regions, said memory cell block regions and said peripheral circuit block regions respectively connected to form circuit block region pairs arranged successively in a first direction and having a width P measured in the first direction; and a plurality of resistors arranged between and connected to said memory cell array block regions and said peripheral block regions of said circuit block region pairs, each of said plurality of resistors extending in a substantially linear manner in said first direction along the width of said circuit block region pairs and having a contact window provided at each end, said plurality of resistors formed close together and parallel to each other, and set up in the form of n (n is an integer greater than or equal to two) stages arranged in a second direction perpendicular to said first direction, each of said plurality of resistors having a length L determined by a relationship (n-1)P<L<nP, said resistors on each of said stages being shifted from each other in said first direction by an amount rP (r is an integer in a range of 1≦r≦(n-1)).
Claim 3
Dependent Claim
32 words
A semiconductor device as set forth in claim 1, further comprising wirings operatively connected to each of said resistors via said contact windows provided at each end of each of said resistors.
Claim 4
Dependent Claim
50 words
A semiconductor device as set forth in claim 1, wherein the semiconductor device is fabricated as a memory circuit, when said memory cell array block regions include memory cells and wherein said peripheral circuit block regions include word drivers, said word drivers comprised of semiconductor circuit elements and resistor elements.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-12 | 1990-07-14 | 1991-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-12 | 1994-07-14 | 1995-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-12 | 1998-07-14 | 1999-01-13 | $7700.00 | Window Closed / Lapsed |