Patent US4634989A successfully refreshed from Google Patents.
US4634989A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital FM detector for a digital signal
Assignee: TDK Micronas GmbH
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Filing: 1985-05-06
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Granted: 1987-01-06
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Expires: 2005-05-06
Abstract
Abstract A digital signal derived from an analog signal by means of an analog-to-digital converter clocked by a clock signal is fed to a first delay element and a 90° phase shifter at the same time. The delayed digital signal is applied through a second delay element to one input of a first multiplier and directly to the other input of this multiplier. In similar fashion, the signal at the output of the 90° phase shifter is applied directly to one input of a second multiplier and through a third delay element to the other input of this multiplier. The output signals of the multipliers are combined in an adder to provide the demodulated digital signal. In accordance with the invention, multiple multiplications and a signal mixture to form the Hilbert-transformed signal, which are necessary in the known prior art, can be avoided.
Inventors
- 👤 Soenke Mehrgardt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 16:11
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/007; H03D2200/00; H03D2200/0001; H03D2200/0035; H03D2200/0041; H03D2200/005; H03D2200/006; H03D2200/0062; H03D3/006
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
196 words
A digital FM detector comprising an analog to digital converter for receiving FM analog signals and deriving digital signals therefrom, the output of said analog-to-digital converter being coupled to first terminals; a digital 90° phase shifter having inputs coupled to said first terminals; a first delay element having an input coupled to said first terminals and providing a delay equal to the delay of said phase shifter; a second delay element coupled to the output of said first delay element and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said first delay element, second inputs coupled to the output of said second delay element, and having an output; a third delay element coupled to the output of said phase shifter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said phase shifter, a second input coupled to the output of said third delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 2
Dependent Claim
196 words
A digital FM detector comprising an analog to digital converter for receiving FM analog signals and deriving digital signals therefrom, the output of said analog-to-digital converter being coupled to first terminals; a digital 90° phase shifter having inputs coupled to said first terminals; a first delay element having an input coupled to said first terminals and providing a delay equal to the delay of said phase shifter; a second delay element coupled to the output of said first delay element and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said first delay element, second inputs coupled to the output of said second delay element, and having an output; a third delay element coupled to the output of said phase shifter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said phase shifter, a second input coupled to the output of said third delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 3
Dependent Claim
58 words
A digital FM detector in accordance with claim 1 comprising: a memory having inputs coupled to said adder output and outputs coupled to said output terminals, said memory being interposed between said adder output and said output terminals and containing arc-sin functions and responsive to said adder output for forming a demodulated digital signal at said output terminals.
Claim 4
Dependent Claim
42 words
A digital FM detector in accordance with claim 1 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between said analog to digital converter output and said first terminals.
Claim 5
Dependent Claim
42 words
A digital FM detector in accordance with claim 2 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between said analog to digital converter output and said first terminals.
Claim 6
Dependent Claim
40 words
A digital FM detector in accordance with claim 4 wherein: said analog to digital converter is clocked by signals at a first clock frequency; and said band-pass filter contains a stage for decimating said clock frequency by an integral factor.
Claim 7
Dependent Claim
170 words
A digital FM detector comprising an analog to digital converter for receiving FM analog signals and deriving digital signals therefrom; the output of said analog-to-digital converter being coupled to first terminals; an odd-order nonrecursive digital filter having inputs coupled to said first terminals; a first delay element coupled to the output of said digital filter and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said digital filter, second inputs coupled to the output of said first delay element, and having an output; a second delay element coupled to the output of said digital filter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said digital filter, a second input coupled to the output of said second delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 8
Dependent Claim
170 words
A digital FM detector comprising an analog to digital converter for receiving FM analog signals and deriving digital signals therefrom; the output of said analog-to-digital converter being coupled to first terminals; an odd-order nonrecursive digital filter having inputs coupled to said first terminals; a first delay element coupled to the output of said digital filter and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said digital filter, second inputs coupled to the output of said first delay element, and having an output; a second delay element coupled to the output of said digital filter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said digital filter, a second input coupled to the output of said second delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 9
Dependent Claim
58 words
A digital FM detector in accordance with claim 6 comprising: a memory having inputs coupled to said adder output and outputs coupled to said output terminals, said memory being interposed between said adder output and said output terminals and containing arc-sin functions and responsive to said adder output for forming a demodulated digital signal at said output terminals.
Claim 10
Dependent Claim
42 words
A digital FM detector in accordance with claim 6 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between said analog to digital converter output and said first terminals.
Claim 11
Dependent Claim
42 words
A digital FM detector in accordance with claim 7 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between said analog to digital converter output and said first terminals.
Claim 12
Dependent Claim
40 words
A digital FM detector in accordance with claim 9 wherein: said analog to digital converter is clocked by signals at a first clock frequency; and said band-pass filter contains a stage for decimating said clock frequency by an integral factor.
Claim 13
Dependent Claim
187 words
A digital FM detector operating on digital signals representative of analog FM signals, said detector comprising first terminals receiving said digital signals; a digital 90° phase shifter having inputs coupled to said first terminals; a first delay element having an input coupled to said first terminals and providing a delay equal to the delay of said phase shifter; a second delay element coupled to the output of said first delay element and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said first delay element, second inputs coupled to the output of said second delay element, and having an output; a third delay element coupled to the output of said phase shifter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said phase shifter, a second input coupled to the output of said third delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 14
Dependent Claim
187 words
A digital FM detector operating on digital signals representative of analog FM signals, said detector comprising first terminals receiving said digital signals; a digital 90° phase shifter having inputs coupled to said first terminals; a first delay element having an input coupled to said first terminals and providing a delay equal to the delay of said phase shifter; a second delay element coupled to the output of said first delay element and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said first delay element, second inputs coupled to the output of said second delay element, and having an output; a third delay element coupled to the output of said phase shifter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said phase shifter, a second input coupled to the output of said third delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 15
Dependent Claim
58 words
A digital FM detector in accordance with claim 11 comprising: a memory having inputs coupled to said adder output and outputs coupled to said output terminals, said memory being interposed between said adder output and said output terminals and containing arc-sin functions and responsive to said adder output for forming a demodulated digital signal at said output terminals.
Claim 16
Dependent Claim
42 words
A digital FM detector in accordance with claim 11 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between the source of said digital signals and said first terminals.
Claim 17
Dependent Claim
42 words
A digital FM detector in accordance with claim 12 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between the source of said digital signals ans said first terminals.
Claim 18
Dependent Claim
40 words
A digital FM detector in accordance with claim 14 wherein: said analog to digital converter is clocked by signals at a first clock frequency; and said band-pass filter contains a stage for decimating said clock frequency by an integral factor.
Claim 19
Dependent Claim
161 words
A digital FM detector operating on digital signals representative of analog FM signals, said detector comprising first terminals receiving said digital signals; an odd-order nonrecursive digital filter having inputs coupled to said first terminals; a second delay element coupled to the output of said digital filter and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said digital filter, second inputs coupled to the output of said second delay element, and having an output; a third delay element coupled to the output of said digital filter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said digital filter, a second input coupled to the output of said third delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 20
Dependent Claim
161 words
A digital FM detector operating on digital signals representative of analog FM signals, said detector comprising first terminals receiving said digital signals; an odd-order nonrecursive digital filter having inputs coupled to said first terminals; a second delay element coupled to the output of said digital filter and providing a predetermined delay; a first multiplier having first inputs coupled to the output of said digital filter, second inputs coupled to the output of said second delay element, and having an output; a third delay element coupled to the output of said digital filter and providing said predetermined delay; a second multiplier having a first input coupled to the output of said digital filter, a second input coupled to the output of said third delay element, and having an output; and an adder having a first input coupled to said first multiplier output, a second input coupled to said second multiplier output and an output, said adder output being coupled to output terminals.
Claim 21
Dependent Claim
58 words
A digital FM detector in accordance with claim 16 comprising: a memory having inputs coupled to said adder output and outputs coupled to said output terminals, said memory being interposed between said adder output and said output terminals and containing arc-sin functions and responsive to said adder output for forming a demodulated digital signal at said output terminals.
Claim 22
Dependent Claim
42 words
A digital FM detector in accordance with claim 16 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between said analog to digital converter output and said first terminals.
Claim 23
Dependent Claim
42 words
A digital FM detector in accordance with claim 17 comprising: a digital band pass filter for passing said digital signals and suppressing interfering components, said digital band pass filter being disposed between said analog to digital converter output and said first terminals.
Claim 24
Dependent Claim
40 words
A digital FM detector in accordance with claim 19 wherein: said analog to digital converter is clocked by signals at a first clock frequency; and said band-pass filter contains a stage for decimating said clock frequency by an integral factor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-05 | 1990-07-07 | 1991-01-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-05 | 1994-07-07 | 1995-01-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-05 | 1998-07-07 | 1999-01-06 | $7700.00 | Window Closed / Lapsed |