Patent US4630003A successfully refreshed from Google Patents.
US4630003A
Expired / Lapsed
US
⏱️ 0.0 years remaining
FET oscillator exhibiting negative resistance due to high impedance at the source of an FET thereof
Assignee: Toshiba Corp
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Filing: 1985-08-19
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Granted: 1986-12-16
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Expires: 2005-08-19
Abstract
Abstract An FET oscillator wherein a bias circuit is connected to a drain of a field-effect transistor and a source circuit including a transmission line and a self-bias circuit is connected to a source of the transistor, so that the source is substantially open-circuited at an oscillation frequency and the field-effect transistor operates as a two-terminal (the gate and drain) element exhibiting a negative resistance, and wherein a resonant circuit is connected to the gate of the transistor. With the source circuit connected to the transistor source, the oscillator can have a high unloaded Q-value of Qo and a high externally-loaded Q-value of Q ext , whereby the oscillation frequency is stable. According to this oscillator, only a single bias circuit for the drain is required without the need of a bias circuit for the gate.
Inventors
- 👤 Hideki Torizuka
- 👤 Tomohide Soejima
- 👤 Shigekazu Hori
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 07:59
CPC Classifications
H; H03; H03B; H03B5/00; H03B5/18; H03B5/1841; H03B5/1847; H03B5/1852
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
114 words
An FET (field-effect transistor) oscillator exhibiting negative resistance due to a high impedance at the source of the FET thereof, comprising: a negative resistance circuit including a strip line of predetermined length, a biasing circuit, a resistor and a field effect transistor, said field effect transistor having a drain which is biased through said biasing circuit and a source which is connected to one end of said strip line via said resistor, the other end of said strip line being grounded, thereby providing a negative resistance between the gate and drain of said field effect transistor, and a resonant circuit connected to said negative resistance circuit for determining the oscillation frequency of said oscillator.
Claim 2
Dependent Claim
114 words
An FET (field-effect transistor) oscillator exhibiting negative resistance due to a high impedance at the source of the FET thereof, comprising: a negative resistance circuit including a strip line of predetermined length, a biasing circuit, a resistor and a field effect transistor, said field effect transistor having a drain which is biased through said biasing circuit and a source which is connected to one end of said strip line via said resistor, the other end of said strip line being grounded, thereby providing a negative resistance between the gate and drain of said field effect transistor, and a resonant circuit connected to said negative resistance circuit for determining the oscillation frequency of said oscillator.
Claim 3
Dependent Claim
32 words
An FET oscillator as set forth in claim 1 wherein said strip line has a length of λ/4, where λ represents a wavelength corresponding to an oscillation frequency of said FET oscillator.
Claim 4
Dependent Claim
39 words
An FET oscillator as set forth in claim 1 wherein said resonant circuit comprises a strip line connected at its one end to a resistor as a dummy load, and a dielectric resonator electromagnetically coupled with said strip line.
Claim 5
Dependent Claim
99 words
An FET (field-effect transistor) oscillator exhibiting negative resistance due to high impedance at the source of the FET thereof, comprising: a field effect transistor having a drain, a gate and a source, a matching circuit connected to the drain of said transistor, a resonant circuit connected to the gate of said transistor, a biasing circuit for biasing the drain of said field effect transistor, a strip line of a predetermined length, one end of said strip line being grounded, and a resistor connected between the other end of said strip line and the source of said field effect transistor.
Claim 6
Dependent Claim
99 words
An FET (field-effect transistor) oscillator exhibiting negative resistance due to high impedance at the source of the FET thereof, comprising: a field effect transistor having a drain, a gate and a source, a matching circuit connected to the drain of said transistor, a resonant circuit connected to the gate of said transistor, a biasing circuit for biasing the drain of said field effect transistor, a strip line of a predetermined length, one end of said strip line being grounded, and a resistor connected between the other end of said strip line and the source of said field effect transistor.
Claim 7
Dependent Claim
32 words
An FET oscillator as set forth in claim 4 wherein said strip line has a length of λ/2, where λ represents a wavelength corresponding to an oscillation frequency of said FET oscillator.
Claim 8
Dependent Claim
22 words
An FET oscillator as set forth in any one of claims 1 to 5 wherein said strip line is a microstrip line.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-15 | 1990-06-16 | 1990-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-15 | 1994-06-16 | 1994-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-15 | 1998-06-16 | 1998-12-16 | $7700.00 | Window Closed / Lapsed |