US4629681A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing multilayer circuit board
Assignee: Mitsubishi Electric Corp
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Filing: 1984-11-09
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Granted: 1986-12-16
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Expires: 2004-11-09
Abstract
Abstract A first conductor layer made of a thick film conductor is formed with a predetermined pattern on a substrate. A thick film resistor is then formed to be connected to the first conductor layer. An insulating layer made of a polyimide resin is formed over the substrate, the first conductor layer and the thick film resistor with through holes on the first conductor layer. Then, plating is applied to the whole surface of the insulating layer, the wall surfaces of the through holes and the exposed portions of the first conductor layer and etching is applied thereto with a predetermined pattern so that a second conductor layer is formed.
Inventors
- 👤 Mitsuyuki Takada
- 👤 Yoshiyuki Morihiro
- 👤 Hayato Takasago
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:05
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/16; H05K1/167; H10; H10W; H10W70/00; H10W70/01; H10W70/05; H10W70/60; H10W70/611; H05K1/02; H05K1/03; H05K1/0306; H05K1/09; H05K1/092; H05K2201/00; H05K2201/01; H05K2201/0137; H05K2201/0154; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09509; H05K2203/00; H05K2203/14; H05K2203/1453; H05K3/00; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/10; H05K3/18; H05K3/181; H05K3/46; H05K3/4644; H05K3/4661
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
200 words
A method of manufacturing a multilayer circuit board comprising the steps of: providing a substrate, forming a plurality of portions of a first thick film conductor layer on said substrate with a predetermined pattern, forming a thick film resistor to be connected to the portions of said first conductor layer by forming and firing a thick film, forming an insulating layer of a photosensitive polyimide resin over said first conductor layer and said resistor, providing through holes in said insulating layer by applying patterning thereto with a mask so that said first conductor layer may be partially exposed, forming a second conductor layer on said insulating layer by applying plating onto said insulating layer and by etching said plated layer with a predetermined pattern, wherein said step of forming said second conductor layer further comprises the steps of: forming a first plating layer on the whole surface of said sbustrate by applying electroless plating, said first plating layer being in contact with portions of the first conductor layer, forming a second plating layer on the whole surface of said first plating layer by applying electroplating, and etching said first plated layer and said second plated layer with a predetermined pattern.
Claim 2
Independent Claim
200 words
A method of manufacturing a multilayer circuit board comprising the steps of: providing a substrate, forming a plurality of portions of a first thick film conductor layer on said substrate with a predetermined pattern, forming a thick film resistor to be connected to the portions of said first conductor layer by forming and firing a thick film, forming an insulating layer of a photosensitive polyimide resin over said first conductor layer and said resistor, providing through holes in said insulating layer by applying patterning thereto with a mask so that said first conductor layer may be partially exposed, forming a second conductor layer on said insulating layer by applying plating onto said insulating layer and by etching said plated layer with a predetermined pattern, wherein said step of forming said second conductor layer further comprises the steps of: forming a first plating layer on the whole surface of said sbustrate by applying electroless plating, said first plating layer being in contact with portions of the first conductor layer, forming a second plating layer on the whole surface of said first plating layer by applying electroplating, and etching said first plated layer and said second plated layer with a predetermined pattern.
Claim 3
Dependent Claim
27 words
A method in accordance with claim 1, wherein said first plated layer is a nickel plated layer and said second plated layer is a copper plated layer.
Claim 4
Dependent Claim
15 words
A method in accordance with claim 1, wherein said substrate is made of alumina ceramic.
Claim 5
Dependent Claim
23 words
A method in accordance with claim 1, wherein said first conductor layer is made of silver-palladium or platinum-gold or copper thick film paste.
Claim 6
Dependent Claim
15 words
A method in accordance with claim 1, wherein said resistor is made of ruthenium oxide.
Claim 7
Dependent Claim
13 words
The method of claim 1, wherein said predetermined patterns are formed by photolithography.
Claim 8
Dependent Claim
19 words
The method of claim 1, wherein the width of the first and second conductor layers is about 30 micrometers.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-15 | 1990-06-16 | 1990-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-15 | 1994-06-16 | 1994-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-15 | 1998-06-16 | 1998-12-16 | $7700.00 | Window Closed / Lapsed |